help in selecting level shifter IC

level shifter ic

Frnds,

Myself doing project on FPGA as part of academics. I need a Level shifter IC between 8-bit Parallel Flash ADC and FPGA. Purpose is to convert high level voltage 5V to 3.3V (acceptable by FPGA)& no shift required in low level. If you have used or know any IC which helps in high level shifting, by accepting 8-bit input parallely, level shift & output parallely, with preferably less conversion time. could u please suggest it?

Regards,
sita

level shift ic

Hello,

use a 3.3V supplied buffer with 5V tolerant inputs, e. g. 74LVC244.

Depending on speed requirements, also a resistive divider could be used, but it would increase ADC output current by some amount. E. g. 150 ohm series, 300 ohm parallel resistance for each bit would cause 10 mA current flow for each output bit in state high.

Regards,
Frank

P.S.: Please avoid cross-posting

ic level shifter

Another possible technique -- if you are using a Xilinx FPGA, you can put a series resistor between your 5V signal and the FPGA input pin, and let the FPGA's input clamp diode limit the voltage. If I recall correctly, Xilinx recommends choosing the resistor so no more than 10mA flows into the input pin, but check the data sheet of your specific FPGA to be sure. Here's some info:
**broken link removed**

level shifter

Thank you Frank & echo47.

Before I could think of a level shifter IC or ADC clocking, I got stuck with a major design problem. Could you please try it?
Actually in input section we are planning to do a speech encoding (anti-alias filter+amplifier+ADC). But it's not necessary that ADC output should actually correspond to analog value. The magnitude of speech signal(amplified value) has got prime importance in our case as we are trying to plot frequency spectrum(amplitude v/s frequency).
We tried to do with a condensor microphone whose audio output range is between (100mV - 1V). There's a DC bias necessary for condensor microphone of 2V. So max peak value=2.5V. If I approximate to 2.56V, step size Δ =(2.56/256) =10mV. {256=2^8, where we are using 8-bit ADC}. First section in FPGA is to subtract DC equivalent value. Will I have to do multiplication by 10mV for each sample[8bit width]???
We are also thinking of doing with simple Carbon Microphone which does not need bias. So that step size may be > 1.
Is there any possible solution to avoid such a multiplication ?

level shifting ic

Hello,

I would have thought that the analog input processing questions should been cleared by the academic stuff taking care for the project. Basically electret (or other) microphones bias hasn't anything to do with ADC input bias, cause speech is an AC signal. It is highly recommended to AC couple the signal to ADC input, biasing ADC input to mid range by resistors.

Additionally some means should be considered: Adjustable amplification in a single stage amplifier, may be an OP. High pass filtering to remove signal components probably disturbing the measurement.

Said AC coupling forms a first order high-pass, higher order could be meaningful. Low pass filtering could also be necessary, depends on intended sampling rate. If the speech signal has higher dynamic, also automatic gain control (AGC) could be an option.

Regarding the PCI clamp diodes mentioned by echo47: With Altera FPGA you have the issue, that these diodes are only activated by configuration, I guess it's the same with Xilinx. After system reset they are inactive, exposing the FPGA input to potentially damaging voltage levels. Thus I suggested a resistive divider instead.

Regards,
Frank

level shifter ic

The input clamp diodes that I described are the ESD protection diodes. They are always available on all I/O pads, and cannot be disabled. Many Xilinx FPGA documents and app notes recommend using them with a series resistor to clamp higher-voltage inputs signals.

A two-resistor voltage divider also works fine, but uses twice as many components.

voltage level shifter ic

Hello,

I see, that this is different between Xilinx and Altera. Xilinx has permanently connected postive camp diodes with non-5V-tolerant device families, Altera hasn't.

Thank you for clarifying.

levelshifter vs resistor dividers

sita said:

Frnds,

Myself doing project on FPGA as part of academics. I need a Level shifter IC between 8-bit Parallel Flash ADC and FPGA. Purpose is to convert high level voltage 5V to 3.3V (acceptable by FPGA)& no shift required in low level. If you have used or know any IC which helps in high level shifting, by accepting 8-bit input parallely, level shift & output parallely, with preferably less conversion time. could u please suggest it?

Regards,
sita

Click to expand...

I successfully used SN74LVTH16245A. This is a 16bit wide transceiver from TI. The advantage of these buffer is the high output current to allow long distances on PCB.

This links you to other buffers of this family

**broken link removed**

For 8bit you may try SN74LVTH245A

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