eruca
Newbie level 2
In my design ,an ads7844 is used, the /cs(chip select pin) is connected directly to gnd(i have only one serial ADC,so i think no chip select is needed ) and the logic operations are controlled by an altera cpld EPM3256a
the problem is that when the power is on,the chip's Busy output signal keeps high, that means the chip is busy all the time with no input at the Din pin(measured at a zero logic level all the time )
any one has the experience?
please help me!
thanks!!
the problem is that when the power is on,the chip's Busy output signal keeps high, that means the chip is busy all the time with no input at the Din pin(measured at a zero logic level all the time )
any one has the experience?
please help me!
thanks!!