ilter
Member level 4
Dear all,
I design current dac. But I don't understand two equations. What's its meaning?
These are the same or double. And I design latches, my power is use digital power.
How do I simulate clk jitter? If my digital power is dirty, how do I do? Thanks.
I design current dac. But I don't understand two equations. What's its meaning?
These are the same or double. And I design latches, my power is use digital power.
How do I simulate clk jitter? If my digital power is dirty, how do I do? Thanks.
