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1st January 2008, 15:20 #1
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lm723
hello board, I want to regulate a SMPS which works @100kHz(~4A), I first look at lm338 that was terrible @100kHz even @10kHz so I ruled it out, then I remembered old good 723. I could not find the information I needed in datasheet, it says @10kHz ripple rejection is amazing 86db, well but what it would be around 100kHz? there was no graph. I can accept even 20db fall in 100kHz even 66 db is quite good for me. dose anybody have experience with 723 @HF? any rough estimate?
thanks

1st January 2008, 15:20

1st January 2008, 18:49 #2
lm723 spice model
The 723 is one of the lowest noise regulators around. I often use it in PLLVCO designs. You can either build a test circuit or simulate the result or contact National and ask for the spec.
Added after 1 hours 9 minutes:
A quick simulation shows about 64dB rejection at 100k with a 4.7uF Cref cap connected. The simulation at 10k (84dB) is close to National's typical spec of 86dB
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1st January 2008, 18:49

2nd January 2008, 06:24 #3
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lm723 design
Thanks a lot Edesign, you helped much, but where you got the SPICE model, I use _altium designer which dose not have a model for 723. Thanks again.

2nd January 2008, 06:24

2nd January 2008, 07:55 #4
lm723 circuit designs
I used the model supplied with Proteus.
Take a look at this page. This may also give you some ideas
http://www3.sympatico.ca/add.automat...ice/ripple.htm
Here is model data for the 723
.SUBCKT LM723 2 3 4 5 6 7 9 10 11 12 13
* CL CS IN IN+ VREF VCC VZ OUT VC VCC+ FRCO
*
AZ1 15 12 ZENER1
J1 15 7 7 JMOD
R1 15 16 15K
Q1 16 16 17 QP1
Q2 20 16 19 QP1
Q3 20 21 7 QN1
C1 20 21 5PF
Q4 12 20 22 QN1
Q5 12 22 23 QN1
R2 23 6 100
AZ2 25 6 ZENER1
R3 21 25 30K
R4 25 7 5K
R5 12 17 500
R6 12 19 25K
R7 12 26 1K
Q6 27 16 26 QP1
Q7 23 27 28 QN1
Q8 27 28 29 QN1
R8 29 7 300
R9 28 7 20K
R10 12 30 1K
Q9 13 16 30 QP1
Q10 22 5 33 QN1
Q11 13 4 33 QN1
Q12 33 28 34 QN1
R11 34 7 150
Q13 12 13 36 QN1
Q14 11 36 10 QOUT
AZ3 10 9 ZENER2
Q15 13 2 3 QN1
R12 36 37 15K
I1 0 9 0
I2 0 2 0
I3 0 3 0
.MODEL QN1 NPN (BF=200 BR=2 RB=200 RC=200 RE=2 TF=0.35N IS=1E14 VAF=125
+ CJE=1.0P VJE=0.7 MJE=0.33 CJC=0.3P
+ VJC=0.55 MJC=0.5 CJS=3.0P VJS=0.52 MJS=0.5 )
.MODEL QP1 PNP (BF=50 BR=4 RB=300 RC=100 RE=10 TF=30N IS=1E14 VAF=50
+ CJE=0.3P VJE=0.55 MJE=0.5 CJC=1.0P
+ VJC=0.55 MJC=0.5 CJS=3.0P VJS=0.52 MJS=0.5 )
.MODEL QOUT NPN BF=80 RB=10 RC=5 IS=1E16 VAF=50 CJE=10P CJC=10P
+ TF=3N TR=20N
.MODEL JMOD NJF VTO=3 RS=1 RD=1 LAMBDA=.02 CGS=5P CGS=5P
.MODEL ZENER1 zener( v_breakdown=6.6 i_breakdown=0.02 r_breakdown=1.5 i_rev=1e4 i_sat=1e12)
.MODEL ZENER2 zener( v_breakdown=6.2 i_breakdown=0.02 r_breakdown=1.5 i_rev=1e4 i_sat=1e12)
.ENDS
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3rd January 2008, 04:35 #5
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subckt lm723
Thanks a lot EDesign I used simulation but I couldn't reproduce the values you mentioned ( 64d&84dB). can you please tell me how did you reached these fantastic values? did you use transient analysis and compared peak to peak values of input and output ripple?
Thanks a lot again.

3rd January 2008, 06:07 #6
lm723 model
Yes, but I did the simulation in Proteus. I can't say how accurate the model is, but it seemed to agree with the spec sheet results.
The model data I posted is from National Instruments. I can't find the data for the Proteus model.
What figures do you get?
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3rd January 2008, 06:07

3rd January 2008, 09:12 #7
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lm723 multisim
Hello EDesign, I think there is a problem with my simulation because results are not logical. I used the model you kindly mentioned. With 10kHz I get something about 61db attenuation but most bizarre thing is with 100kHz ripple I get ~66db attenuation which can't be true. One of my friends uses proteus, I asked him to simulate the same circuit with proteus, he said he couldn't get a meaningful result because output of 723 is a flat line with no ripple and no matter how much he zooms or how many volts of ripple he feeds the 723, it is flat! The only way he could detect a ripple is to lower supply voltage or increase ripple so much that in negative portion of sine wave total supply voltage be less than 2 volts more than output voltage, but this is not acceptable because supply voltage should have at least 3V margin relative to output. So we have three different results with the same model, yours, mine and my friend! while your results are very logical but I like to know how can I reproduce it at least in proteus of my friend this is the result of my simulation @10kHz
Transient start time 5mSec
Transient stop time 10mSec (5.5mSec for 100kHz)
Transient step time 2uSec
Transient max step time 2uSec
All SPICE varables were in their default values except:
I only incremented itteration limits:
ITL1=300, ITL2=100, ITL4=500
No Error and I got this(in second graph, every division is 250uV)
for this circuit
Thanks

3rd January 2008, 19:23 #8
lm723 pspice model
I only used the 723 by itself set to 5V out and 15V in with 2v peak ripple. I also had the Fcomp cap set at 100pF
The best way to find the truth is to email National Semiconductor and ask for the spec.
Added after 3 hours 3 minutes:
I did another simulation with Multisim with the model I gave you. The same setup but without any Fcomp. 5V out, 15V in 2Vpp ripple. Results: 10k (85dB), 100k (66dB).
Without C2 the results are: 10k (74dB), 100k (55dB). Note that I had to change the full scale range for the right side 10k meaurement.
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