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How to display fraction in VHDL simulation???

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khaila

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represent fractions in vhdl how

supposed an unsigned vector A_UNS which represent 4.3 in form q.r:
4 : represents 4-bit of the QUOTIENT
3 : represents 3-bit of the REMAINDER

for example:
decimal vector 9.125
is represented in binary as A_UNS="1001.001"
the simulator will show A_UNS as 73 =======> "1001001"b=73d
if I will apply grouping signal I may seperate the QUOTIENT and REMAINDER

QUOTIENT will reperesented as 9d
but
REMAINDER still represented as an integer which is 1d

my quastion is:
How I may dispaly REMAINDER as fraction form which is 0.125 or 125????
 

Hi,
Declare a real number, say 'myfrac' then convert your faction part into 'real' type in your vhdl code,(as you would do using a paper and pencil) and store it into 'myfrac' then view 'myfrac' in waveform.
Kr,
Avi
http://www.vlsiip.com
 

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