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Logic design, how do I find out the bit-length of numbers?

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kel8157

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Hello!

My design is a large parallel processing unit, which requires to find the
bit-length of signed numbers and dynamic shifting in a single cycle

Here is my code..
Are there any more efficient/fast methods to accomplish these two tasks?
My clock cycle is stingent, and many nested ifs or long case statements
might cause timing issues in later stages.

// Look for bit-length
reg [5:0] bw;
reg [31:0] d0, d1, .. d15;

wire [31:0] d0w, d1w, .. d15w;
wire [31:0] tmpw;
assign d0w = (d0[31]) ? {~d0 + 32'd0} : d0;
..
assign d15w = (d15[31]) ? {~d15 + 32'd0} : d15;
assign tmpw = d0w | d1w | .. d31w;
always @(the list) begin
if(tmpw[31] || tmpw[30] )
bw <= 6'd32;
else if (tmpw[29])
bw <= 6'd30;
else if (tmpw[28])
bw <= 6'd29;
....
end
Click to expand...


// dynamic bit-shifting
input [4:0] shift_pos_in;

reg [31:0] din;
reg [31:0] dout;

always @()
case (shift_pos_in)
5'd0: dout <= din;
5'd1: dout <= {din[31], din[31:1]};
5'd2: dout <= {2{din[31]}, din[31:1]};
..

endcase
end
Click to expand...

:D
 

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