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Negative timing check annotation problem

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sivasankar

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negative timing check

Hi,
I am working Netlist simulation on .13um TSMC library. While loading the design modelsim say that "negative check specify delay to zero"
How will I inform the tool to annotate negative delays. I am not using +no_ngchk option. So unless otherwise we specify, it should annotate negative delays aswell.

In library I found "`ifdef NTC" what is this "NTC" define for?

If anyone could help me out, would be great.
Thanks
Siva
 

negative timing checks

To run with negative timing check must need the simulator support and the library model writen with negative timing support style. I had saw the artisan TSMC 018um library isnt writen with negative timing check support style.

Sincerely,
Jarod
 

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