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LVS for cell-based design

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need lvs verification

Hello, I have some questions of LVS for cell-based design.

1. Since both the layout and netlist are generated by P&R tools,
is it necessary to do LVS?

2. We add the bond cells of the staggered IOs in layout editor
and add texts on those cells for runnung LVS. Also, we have to
modify the netlist from P&R stage because of the newly added
bond cells. Is there any automatic approach to do these jobs?

3. If possible, could anyone tell me the procedures of LVS in your
company?

Thanks for your answers!
 

hi

Even if you p&r by eda tools ,you still need lvs coz some mistake should be made by p&r tools and it's inevitable. And lvs is some important job in the design flow.
 

Although P&R have less LVS mismatch, the real problem mostly come from ECO, those handcrafted part do need careful LVS check.
 

I once used Hercules (from Avanti) to do LVS and DRC after P&R.
First, prepare the input netlist files from schematic and layout. then, config a RUNSET file from technology library. After running Hercules LVS explorer, you can read report file for result, or check LVS vilations from layout directly.
 

From my pass experience, the P&R tools like SE might make a short without it's own noticed if you are using a bad library (such as the pin location is not on grid). So, for safety reason, it's always batter to use a saperate LVS tools to redo the verification.
 

hi,all
where can I get some useful material to learn lvs/drc for newbie?
Thanks.
 

The nomal processdure is to do P&R and do post simulation like timemill and powermill, if not suitable, yo should do it agagin, finaly, just before type out, a DRC/ERC/LVS checking on the final GDSII must be carried out
 

I think it's quite important that you do an LVS on your digital block. We
have seen cases where the routing was so dense that even SE makes
errors and just shorts nets! So a good methodology is to perform an LVS
just with the digital block. About learning how to use LVS / determine LVS
errors I only can say that experience can help you. Even when you are
that experienced, believe me when debugging dense P&R.... you could
spend several hours before you find the errors certainly when you are
talking about soft connections etc...

Good luck 8)
 

linuxluo said:
hi,all
where can I get some useful material to learn lvs/drc for newbie?
Thanks.
Click to expand...

The document come with the tool:Hercules, Calibre, or Dracula, Assura...
 

The tools P&R such as Astro can not totally guarantee the LVS pass after
P&R, besides you have your own hard macro and you may do a lot of ECO change after you floorplan is ready.
 

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