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I was thinking of routing the track instead of adding an extra component. Is it possible to route the OVD track in the second layer under the high voltage track on the first layer?
Refer some standards,like Ul 61010,UL 840,UL 508,which are been used extensively to achieve creepage and clearance for high voltages(Ac/dc) and its very useful to sell the product in the global market.
Normally primary side regulation with a common transformer for low cost but good cross-load regulation is done instead of separate T's. but if secondary OVP needs isolation , opto or tertiary windings are used for Control System and sensing OVP direct.
Some of the above information is not quite correct... Inner layers are insulated creep age and clearance distances from IEC 60950 etc above do not apply.....FR4 is an extremely good insulator, inner layers of PCBs are the same as insulated wires, they are insulated, look at IPC-2221, section 6.3.
I was thinking of routing the track instead of adding an extra component. Is it possible to route the OVD track in the second layer under the high voltage track on the first layer?
Yes, if people look at your schematic they will see the primary and secondary sides are not isolated, but share a common ground and +12V so YES just run the track on an inner layer.
Yes, if people look at your schematic they will see the primary and secondary sides are not isolated, but share a common ground and +12V so YES just run the track on an inner layer.
And the common +12V, I tend to read what is there and if it is not a blatant obvious mistake I don't presume. As stated in post #3 he wants to run a track, now without more information we can only presume, so I answered the questions directly.
Again it is interesting to see how wide the misunderstanding is regarding inner layers and creepage and clearance distances, I see all sorts of views from engineers from half the quoted distances to full quoted differences to everything in between to some that even get the distance correct for inner layers.
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