Nikolai
Member level 3
hello..
i've written the following code for a 64x16 ram..
after synthesis the reports show that the slice utilization is 41%.
Isnt that too much.. Can i minimise the area occupied.?
Im new to constraints, so has it got anything to do with area constraints. ?
Here's the code
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity Ram_1k is
Port ( addr : in STD_LOGIC_VECTOR (15 downto 0);
sel : in STD_LOGIC;
rw : in STD_LOGIC;
ready : out STD_LOGIC;
data : inout STD_LOGIC_VECTOR (15 downto 0));
end Ram_1k;
architecture Behavioral of Ram_1k is
begin
process(addr,sel,rw)
type t_mem is array (0 to 63) of STD_LOGIC_VECTOR (15 downto 0);
variable mem_data : t_mem :=
("0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000");
begin
data <= "ZZZZZZZZZZZZZZZZ";
ready <= '0';
if sel = '1' then
if rw = '1' then
data <= mem_data(CONV_INTEGER(addr(15 downto 0))) after 1 ns;
ready <= '1';
elsif rw = '0' then
mem_data(CONV_INTEGER(addr(15 downto 0))) := data;
end if;
else
data <= "ZZZZZZZZZZZZZZZZ" after 1 ns;
end if;
end process;
end Behavioral;
i've written the following code for a 64x16 ram..
after synthesis the reports show that the slice utilization is 41%.
Isnt that too much.. Can i minimise the area occupied.?
Im new to constraints, so has it got anything to do with area constraints. ?
Here's the code
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity Ram_1k is
Port ( addr : in STD_LOGIC_VECTOR (15 downto 0);
sel : in STD_LOGIC;
rw : in STD_LOGIC;
ready : out STD_LOGIC;
data : inout STD_LOGIC_VECTOR (15 downto 0));
end Ram_1k;
architecture Behavioral of Ram_1k is
begin
process(addr,sel,rw)
type t_mem is array (0 to 63) of STD_LOGIC_VECTOR (15 downto 0);
variable mem_data : t_mem :=
("0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000");
begin
data <= "ZZZZZZZZZZZZZZZZ";
ready <= '0';
if sel = '1' then
if rw = '1' then
data <= mem_data(CONV_INTEGER(addr(15 downto 0))) after 1 ns;
ready <= '1';
elsif rw = '0' then
mem_data(CONV_INTEGER(addr(15 downto 0))) := data;
end if;
else
data <= "ZZZZZZZZZZZZZZZZ" after 1 ns;
end if;
end process;
end Behavioral;