Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Total burst size in bytes is determined by HSIZE * HBURST. If the starting address in a burst (HADDR) is not a multiple of HSIZE*HBURST (i.e. aligned), and wrapping is used, then the address will increment until it hits a multiple of HSIZE*HBURST then wrap around to the previous multiple of HSIZE*HBURST.
example:
a wrap-4 burst transfer, 32bit size for one beat, first address 32'h0000_0001, the transfer will be as following:
word 1, address 32'h0000_0001;
word 2, address 32'h0000_0002;
word 3, address 32'h0000_0003;
word 4, address 32'h0000_0000;
----------
that's it!
The wrapping is clearly explained in the protocol specification. One thing you have to take note of is that the address should be aligned and cannot start at a random address.
All transfers within a burst must be aligned to the address boundary equal to the size of the transfer. For example, word transfers must be aligned to word address boundaries (that is A[1:0] = 00), halfword transfers must be aligned to halfword address boundaries (that is A[0] = 0).
So if you are performing word transfers you cannot start at an address with A[1:0] = 10 or for that matter any thing other than 00
example:
a wrap-4 burst transfer, 32bit size for one beat, first address 32'h0000_0001, the transfer will be as following:
word 1, address 32'h0000_0001;
word 2, address 32'h0000_0002;
word 3, address 32'h0000_0003;
word 4, address 32'h0000_0000;
----------
that's it!
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
