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These terms are usually associated with DRAM transfers. In general, you send some commands indicating the starting point of data you want to write or read and then once the transfer starts occuring, new data is sent on every clock without having to stop for additional commands.
Burst Length indicates how many data packets will be delivered before additional control commands are required.
Why do we need this? To make the data transfer occur faster. A single DRAM access is bogged down with overhead. First you have to open a bank, then activate a row, then issue the read or write to a particular column and then wait till after the CAS latency time to actually get the data.
Burst accesses let you pay this overhead once for several chunks of data.
Burst mode is also used for DMA transfers and PCI-X transfers. The concept is the same. Send the control info first and then the data in a big chunk.
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