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lock range and capture range

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chacha

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lock range

Hi

For a pll, why the lock range is more than the capture range??
can any body expalin more clearly??

thanks.
 

capture range lock range

Hope this will clear your doubt

•Capture range
frequency range over which PLL can lock on signal

•Lock range
frequency range over which PLL can track input variation

Capture
To be in the capture state their must be an external signal and the feedback loop must be closed.
In the capture state the PLL is in the process of acquiring a lock.

Lock
In the lock state, the VCO output frequency is lock onto the (equal to) the frequency of the external input signal.
In the lock state, the VCO output frequency tracks (follows) changes in the frequency of the external input in the external signal.
 

so, as i lock range , vco output frequency tracks the input frequency that means there is some change in input frequency which is getting tracked. The frequency up to which this tracking is possible is lock range. But , notice, there is tracking going on , i.e something is changing which is getting tracked. So this change in something should not be too large for the PLL to track the change. i.e. the change should be limited and this limit in the value of change (which can be tracked) is called capture range.

Clearly , the change will be incremental and can't be larger than the range of frequency of your designed PLL.

hope this makes more sense.

thanks
 

lock range capture range

dkumar said:
... So this change in something should not be too large for the PLL to track the change. i.e. the change should be limited and this limit in the value of change (which can be tracked) is called capture range.
...
hope this makes more sense.
No, it doesn't, sorry. It's called lock range, s. kumards posting above!
 

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