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who ever did pwm chip with fpga

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You can use an adder to implement PWM function and the carry of msb will be the final output.
 

PWM is pulse width modulation. It work by counter. So, u can design it via counter or timer.
If u need, I may exchange it with u
 

If you use timer or counter , the pulse is like __________
|
|
|__________,
if adder , you will get ___ ___
| | | |
| | | |
| | | |
____| |___| |____ .................

Depends on your choice.
 

Sorry , the previous one's position
is shifted, So I redraw it.
__________
|
|
|__________,
if adder , you will get
___ ___
| | | |
| | | |
| | | |
____| |___| |____ ............
 

? Your drawings doesn't make much sense, please explain or redraw.
 

Sorry , blank was omitted so my drawing doesn't make sense.

If you interpolate 16 levels in one PWM time and assume the current signal amplitude is 0.5 ,
the timer or counter result will like :

1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0,

the adder result will like :

0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1.

So it depends on your requirement.
 

who ever did pwm chip with fpga

Hi cyteng,
I agree that both way will produce a pulse width modulation but the first choice is, as far as I know, the one that is mostly used.

junchaoguo51888,
go to xilinx web site and search for PWM. They published a paper some time ago (you can get the vhdl code too) which is basic but might help you.

take care.
 

I've done a little about PWM with FPGA,I've used counter and the result is satisfying.While I have no idea of the second choice which is provided by cyteng,
 

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