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Virtual ground and DC bias

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Jim cage

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Hi,

In switch capacitor applications (or simply just an regular integrator), How do we acheive virtual ground in the non-inverting pin of the op-amp?

Since there is a capacitive feedback, how do we maintain a virtual ground on the non inverting input? Even if the op-amp has infinite gain, the feedback is capacitor and open circuit at DC so how can it be that there is a virtual ground?

See figure below
 

well, at 0Hz (true DC) you have an open circuit. but because you have a switching circuit, you actually have a dynamic signal and that will get the loop kicking in (no matter how low the frequency of that signal is).
 

But if you take the integrator with the OP-amp RC, how is the virtual ground maintained on the noninverting input?

Also in SC circuits, how is the virtual ground maintained?
 

i think, practically the (so-called ideal) feedback capacitor would have a small resistance in series with it(practically) and also the capacitor would not practically act as an open. hence the current might surely find a path through the feedback, thus would establish a virtual ground at the inverting terminal.

i think this might be the case....
 

If the resistance is in series then it still an open circuit at DC
 

When you analyse DC steady state circuit, you can see capacitor as an open circuit, but in the integrator with the OP-amp RC circuit not steady.
In the integrator with the OP-amp RC (in your figure node 1 5 6), Vs = DC voltage, if at t=0 voltage across the capacitor is 0, OP-amp is ideal so pin + and pin - are the same voltage (ground in this situation). There is a current flow form Vs to node 5 (with value is Vs/R2), because input current of ideal OP-amp equal to zero so this current will flow to capacitor make it voltage increase. When t increase, t>0, the voltage of capacitor increase (because input current of OP-amp is always equal to zero) so the circuit'state is not steady state so we can't see the capacitor is an open circuit to analyse in this situation. To analyse this circuit accurately in this situation, we can see OP-amp is ideal and use KCL and KVL to find current and voltage. If you afraid that we use ideal OP-amp to solve there is not accurate you can use its linear model (because in this circuit we use OP-amp ' linearity) with input resistor and voltage gain is very large.
This is my opinion. Hope it helpful.
 

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