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I have tried such "mechanical" conversions, and the result is generally not pretty.
Abel is lower level (more hardware oriented) than VHDL, and the language structure is very diferent, too. Therefore the conversion result is quite unreadable. Altera has something called AHDL, which is much closer to Abel, and porting Abel HDL to AHDL might work a bit better. Also AHDL is in its way half step toward VHDL in structure. However, I do not know if that route would be more useful.
Therefore I would recommend not to waste too much time in Abel to VHDL conversion, but rather just roll up the sleeves and start the hard manual work
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