Source follower pole-zero intutively?

source follower pole

When trying to intutively understand how a zero occurs in a circuit...

For any zero I am of the understanding that for a finite Vin ==> the ouput Vout(Sz) =0 [Sz being the freq of the zero.]

Now, if I apply a signal at the input then

In a common source stage:
Intutively, The feed-forward path(thru Cgd) and the main transistor path both produce signals which are equal in mag but opposite in phase and they cancel out each other to give a zero at the ouput.

But how does the zero occur in source follower stage?.. since the input and the output(main transistor path) are in the same phase , aswell as the signal thru feed-forward path(thru Cgs) will be in the same phase as the input signal. how does the output go to 0 for a zero(@Sz) to exist?

I tried my best to explain without the aid of a paper and pen...pls do let me know if i need to be more clear..

I can write equations and get the transfer function and prove them right but cant seem to understand them intutively.... hence the post!!!

thx

I also want to know the intuitve way to explain that.

In Razavi's book, it says " This is because the signal conducted by Cgs at high freq adds with the same polarity to the signal." in page 178. But I still have no idea what is that means.

In my opinion, the speedy way to solve this is applying the output node as virtual ac ground, and sum two path current at output node as zero to find the zero frequency.

exp: source follower
Vin/Z_Cgs+Vin*gm=0
S=-gm/Cgs -> LHP zero

I can help you explaining a fundamental topic related to circuit theory:
As you can see in the following pic. the transfer function has a LPH zero as well as two poles; really this zero at -1/R1C1 is negative since we don't have any dependent sources (or active elements) in the circuit (this phenomenon is valid for its poles locations).
but as you have seen in common-source config. at output node sum of sourcing current from feedthrough pass and sinking gm.Vin equals zero at +gm/Cgd. Also this scenario occurs at the output node of source follower config.:
(Vin-Vout)Cgs.S + gm(Vin-Vout)=0, where Vout=0 --> LPH zero = -gm/Cgs
in other word, here at negative frequencies cap. would be negative then cancelation occurs!
If it has helped you, then if you want, press the Helped me button; it doesn't cost you any points!
Good luck

Regards,
SAZ

Zabihian,

Thank u for your reply..

I am bit confused on what you meant by negative frequency... I got the same equation as you did -gm/cgs when I wrote the trasfer function. and since there was a negative(-ve) sign I understood it to be a LHS zero..

but am not sure on how a LHS zero will behave in a transient condition

say a sine wave input at the gate..

How the currents from both paths cancel each other...?

""Intutively, The feed-forward path(thru Cgd) and the main transistor path both produce signals which are equal in mag but opposite in phase and they cancel out each other to give a zero at the ouput. ""

it's easy to understand zero if you donot use "cancel" for zero generation. zero is not generated by (+1) - (+1) = 0 like in math

imagine in frequency area, tran function with only one pole will fall by stable SLOPE1.

intuitively , if two paths which includes two DIFFERENT poles are combined, at lower frequency area, the resulted tran function's slope=SLOPE1, BUT there are ALWAYS some frequecy band where the slope is less than SLOPE1 which means that zero occurs, and finally the slope reach 2*SLOPE1.

so i want to say that zero is generated whenever the falling speed of tran function is depart from or less than SLOPE1. zero slows gain reduction

in source follower case, you can imagine cgs and gm generate two path with different pole, when small signal from the 2 paths combine, zero occur when output=0 and current from gm = current from Cgs. because current direction is inverse, so zero is negative.

analogartist said:

For any zero I am of the understanding that for a finite Vin ==> the ouput Vout(Sz) =0 [Sz being the freq of the zero.]

Click to expand...

You can always start from this and ask yourself what does see capacitance?
In the case of CS capacitance it see -1/gm, and then you have RHP zero... Generally for RHP zero you need some inverting active element.
In the case of source follower zero voltage means zero current id, which is achieved when capacitance see +Rs and you have LHP zero... Zeroes are generally cosequence of two direct paths from input to output with different speed. Reason for this is when you add a1/(1+s/w1)+a2/(1+s/w2), you will have s in the numerator (in the case when w1 and w2 are not equal).
Some examples of zeroes:
-Rf and Cf, like in previous picture and source follower
-Cf and nmos like in cs
-differential amplifier has also two paths to output trough different mosfets

Zeroes have differentating (i.e high pass) property... In step response RHP acts due to initial positive feedback, like undershoot until negative feedback become stronger.
LHP zero is usually not alone, and it is combined with other poles...