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the clock of Xilinx Vetex2 FPGA?

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I have 2 questions to ask for help :
1.Can Xilinx virtex2 FPGA accept 250MHz clock?
2.Can Xilinx virtex2 FPGA output 250MHz clock signal from IOBs?
 

i think that if you read the datasheet you can find this info.
If you would use a 250 mhz internally i think that is possible but very hard.

Bye.


G.
 

You can use 250M clk in vertix2p.
But it is very hard. Maybe the floorplan should be done manully.

For output 250M clk, you can see the PLL's descirpt in datasheet.
 

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