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Looking for synthesizable VHDL /Verilog code for a simple adpll

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janarthanan

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can anyone provide me synthesizable vhdl /verilog code for a simple adpll.
adpll comprises of pfd,
up/down counter loop filter and
divide by n dco.
if u have any other architecture its fine,
please help me its urgent
 

Re: code for adpll

you may take a look on this website ..

**broken link removed**

I didn't test the code whether it is usable or not.. you can try and share your experience..

mm//
 
Re: code for adpll

i tried it. but i dont know whether it is working or not.
the output is not seems to be working becoz there is no indication of output being locked
 

code for adpll

not sure why do you need it for???
 

Re: code for adpll

actually its my final year project.
my project title is adpll design and jitter analysis.

for jittter measurement and jitter reduction, i need a synthesizable adpll code.

adpll is to be used for clock generation and clock multiplication.
 

Re: code for adpll

janarthanan said:
i tried it. but i dont know whether it is working or not.
the output is not seems to be working becoz there is no indication of output being locked
Click to expand...

Hi, do you still have a copy of the verilog code from the website "http://www-unix.ecs.umass.edu"? or do you have a working verilog code for adpll? i am having troubles with mine. :/
 

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