Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

verilog code for soft output viterbi decoder

Status
Not open for further replies.

cmangaraju

Newbie level 4
Joined
Sep 9, 2006
Messages
7
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,283
Activity points
1,323
viterbi decoder verilog code

hi ,
i am doinga project on soft output viterbi decoder, i have a cofusion between soft viterbi and hard viterbi,
will , replacing hamming distance by euclidean distance become soft output viterbi decoder. please send me some material regarding this.
 

in FPGA ,the computational complexity of euclidean distance is largee than Manhattan Distance
so i think Manhattan Distance will be a better choice
concerning the soft viterbi,you will need quantitate the code
1 1--(-4,-4) use 3bit
0 0--(3,3)
 
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top