Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Xilinx Virtex questions about parameters(VCCINT,VCCO,VREF..)

Status
Not open for further replies.

xfpgas

Junior Member level 2
Joined
Apr 10, 2003
Messages
24
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
350
Xilinx Virtex Questions

I see these parameters listed in Virtex Datasheet. VCCINT, VCCO, VREF,VIN. I dont have a good EE background (I am a CE ). However I really want to understand the electrical part of the FPGA. Please pardon me if i sound ignorant..

I know the Virtex CHIP requires a 2.5V to power up , or the 2.5V is the core voltage.

1) What does the term CORE Voltage really mean? I mean the Core Voltage is 2.5V, but how can I have IOs on the chip that tolerate 5V, how is this different from the core? How does Xilinx Do it?
2) Why would an engineer wanto look at these parameters VCCINT, VCCO, VREF, VIN and any other I might have missed? What do they mean?
3) I understand that in Virtex each bank can be configured independtly in terms of the IO standard ( LVTTL, PCI etc). I also understand that depending on the IO standard of the Bank, each bank would need a VREF. Am I correct? But I really dont understand how this works.
4)Also, what are the possible scenarios in which you can fry a Virtex FPGA ( or any other FPGA) on a board, specifically electrical issues.
5)If a Virtex is fried, what really happens ..imean the electrical stuff on the CHIP. I want to understand the process.

Please feel free to treat me as very ignorant of some basic EE stuff when you answer the questions :)
TIA,
Kode
 

Re: Xilinx Virtex Questions

xfpgas said:
1) What does the term CORE Voltage really mean? I mean the Core Voltage is 2.5V, but how can I have IOs on the chip that tolerate 5V, how is this different from the core? How does Xilinx Do it?

Core voltage means that the chip is working on this voltage. The IO voltage is the voltage supported by FPGA IOs, you can use tham in the different IO standards.

xfpgas said:
How does Xilinx Do it?

It is simple, the IOs are made to be higher voltage tolerant, using a diode.

You can find the sch in virtex user manual, under IOs section.

xfpgas said:
2) Why would an engineer wanto look at these parameters VCCINT, VCCO, VREF, VIN and any other I might have missed? What do they mean?

VCCINT means a core voltage input, you have to connect this pin on a specific voltage (2,5V for virtex)

Vref is an IO for a specific IO voltage standards like BLVDS, GTLP or others.

Vin is a input voltage on a user defined pins

xfpgas said:
3) I understand that in Virtex each bank can be configured independtly in terms of the IO standard ( LVTTL, PCI etc). I also understand that depending on the IO standard of the Bank, each bank would need a VREF. Am I correct? But I really dont understand how this works.

Each bank IO have its own voltage standard, you can not use two different standard per bank. Vref is needed only for some IO standards


Good luck, Bart
 
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top