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What is the difference between verilog hdl and vhdl?

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vhdl

what is the difference between verilog hdl and vhdl
 

Re: vhdl

hi
they r like c and c++. the programming is almost similar.if u r familiar with verilog, u can find vhdl easy and vice versa
cheers
skr
 

Re: vhdl

Verilog and VHDL are the two different hardware description languages used in the present day industry
 

Re: vhdl

VHDL and Verilog are languages for hardware design.
VHDL is ADA based and Verilog is C based language.
Some people find that Verilog is easier to learn, others find VHDL is more
powerful, so see bi\oth languages and decide which one to learn:D
good luck
 

Re: vhdl

Verilog and VHDL both are hardware languages,but i think verilog is more suitable for low level designs.
 

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