What are the logic levels at the output if the nmos and the pmos are interchanged?

vkarthik.ee · May 1, 2006

if the position of the nmos and the pmos are interchanged what are the logic levels at the output?
will the circuit function properly as a buffer ?

jlee · May 1, 2006

Re: cmos inverter

If PMOS and NMOS are interchanged (NMOS on the top, PMOS on the bottom), it will become a push-pull output stage.

venkateshr · May 2, 2006

Re: cmos inverter

vt for low and vdd-vt for high . decent buffer .following ckt shd be designed to avoid static current

windmillkity · May 5, 2006

Re: cmos inverter

venkateshr is right