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frequency divider and duty cycle modulation

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mmajid

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I need a circuit capable of producing square wave signals (0 to +5V pulses)

with some fixed frequencies like 30,20,15,10,5,1 MHZ

(the exact value of them is not so important, for example 9 ~ 11 MHZ

is acceptable instead of 10MHZ ).


I found the attached schematic on the web.the circuit produces square wave pulses

by means of a 1MHZ crystal oscillator based on 4584(IC1 in the schematic), and then

successively divides the frequency by 10 by means of a 4017(IC2~8 in the schematic),

and obtains 100k,10k,1k,100,10,1Hz square pulses.


I had tried to use this circuit for my purpose, but the problem was that the maximum

input frequency for 4584 is about 2 MHZ.


because 74HC4017 supports high frequencies( >50MHZ ),can I replace 4584 based crystal

oscillator with a single 33MHZ oscillator (DIP TTL compatible +5V oscillator) and

then feed the oscillator signal to 4017 to obtain square wave pulses whith frequcies

like 33/2, 33/3,...33/10 MHZ ?


The other problem is that 74HC4017 lowers the duty cycle of the output pulse by the

same factor that lowers the frequency.How can I turn back the duty cycle of the

output to the 50% level?

It has been mensioned on the phillips 74HC4017 datasheet (the attached paragraph)

that the output pulse withs (duty cycle) can be increased by inserting a RC circuit

on the MR input(PIN 15) of the 4017.How it can do this job, and what specifications

it must have? Can you draw the schematic of such a circuit?

On this schematic we can see that the MR pin is connected to a ouput pin.I think

that this will reset the counters successively.what will be the effect of it

on the output?

Because my knowledge of electronics is very limited, can everybody help me by very simple

terms or drawing schematics or refering to somewhwer on the web (for free schematics).

I will be very very pleased if you can help me in this way.
 

mmajid,
One way to get 50% duty cycle is to double the clock frequency to the 4017, and feed the 4017 outputs to the clock input of a JK flip-Flop with the J and K inputs connected to "1". The JK flip flop will toggle at each clock pulse, producing a perfect 50% duty cycle, independent of frequency.
Regards,
Kral
 

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