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Verilog 2001 File I/O: read large file?

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davyzhu

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Hi all,

I want to read one data @(posedge clock) and compare with my module output.
The data file may contain one million data and very large.

What's the most efficient way to do it?

My boss told me to use $readmemh, but it seems waste RAM.
Does Verilog 2001 support buffered read like in C? Where can I find the definition?

BTW, I use Modelsim 6.

Any suggestions will be appreciated!
Best regards,
Davy
 

davyzhu said:
Hi all,

I want to read one data @(posedge clock) and compare with my module output.
The data file may contain one million data and very large.

What's the most efficient way to do it?
Click to expand...

I would like to understand what kind of design this is to offer efficient comment/suggestion. On the face of it, the verification architecture/approach seems to be not well thought out. For e.g. if this is an image processing system, an offline UNIX diff is a far better choice.


My boss told me to use $readmemh, but it seems waste RAM.
Does Verilog 2001 support buffered read like in C? Where can I find the definition?

Davy
Click to expand...

$readmemh can take start and end addr as well. So you could read say 1024 locations at one go, hence using only a 1K memory.

Does that help?

Regards
Ajeetha, CVC
www.noveldv.com
 

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    davyzhu

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