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Digital oscilloscope Project

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www.usb-osc.narod.ru/files/sch.zip

simce said:
2. Use of resitor and capacitor (RC filter) or LC filter on VDD of U5 and U6 to reduce digital noise from U5 and U6 injected into analog voltage during operation of DAC.
Measurements are not made while DACs (U5 and U6) are operated. Is it still nessesary with filtering?

simce said:
3. How FPGA is cofigured (only via USB/JTAG) or somehow else? Does it has internal configuration memory?
Yes the FPGA is configured via USB->JTAG inteface at each power-up.

simce said:
Another question about PWS:
Power is drawn from USB, goes through TRACO DC/DC convertor and goes to 3.3VDGEN and to ITX5, but from where comes 3.3VDG? Does shorcut is supposed to be placed between 3.3VDGEN and 3.3VDG on ITX5?
Yes, a short circuit should be mounted, if no microcontroller and LCD is connected to ITX5.
 

www.usb-osc.narod.ru/files/pcb.zip

I have seen your news schematics!! Wou!! Very changes I have seen!!
Seems so good!!!

It's necesary to isolate all external lines (jtag, usb)??

It's a little expensive using DC/DC to islate USB power of Scope power??

You divides the input signal 1/40. I think that it is a lot. ¿Can´t be 1/10, 1/50 1/100? And select one of them?? (Your first schematics was like these)

Best Regards!!!
 

game boy osciloskope

se06745 said:
You divides the input signal 1/40. I think that it is a lot. ¿Can´t be 1/10, 1/50 1/100? And select one of them?? (Your first schematics was like these)
Please read the previous posts in this topic.
 

avr-scope

It's necesary to isolate all external lines (jtag, usb)??
This was allready discussed, read previous messages.
It's a little expensive using DC/DC to islate USB power of Scope power??
You can power DSO from separate power supply and not from USB.This way you will avoid use od TRACO DC/DC convertor and optocuplers.
(Your first schematics was like these)
This is more predictible solution and has less unexpected and unpredictable capacitances.
 

oscilliscope front end

Measurements are not made while DACs (U5 and U6) are operated. Is it still nessesary with filtering?
I'm not sure what happens when digital informations are stored in DAC and output signal is stalled. If nothing is happening (if internal digital logic is driven by SCK) than this filtering is not necessary.
Yes the FPGA is configured via USB->JTAG inteface at each power-up.
I've noticed that FPGA is configured via USB->JTAG, but what about stand alone version? It has to be configured by microcontroller or similar "device". I can not see any interface for this configuration or again JTAG via ITX5 will be used?
Also capactors close to GAIN controlls of VGA are needed to cancel inducted noise that will be amplified.
 

hobbyscope oscilloscope

simce said:
I've noticed that FPGA is configured via USB->JTAG, but what about stand alone version? It has to be configured by microcontroller or similar "device". I can not see any interface for this configuration or again JTAG via ITX5 will be used?
Yes the FPGA should be programmed via the microcontroller and an external flash/eeprom.
This part is not finished yet, it is only a draft.
Maybe JTAG will be used for this too, but it would probably be made with other serial configuration istead, because it will make intefacing easier.
We are not working with this right now.
I also have some other suggestions for changes to replace the opto-couplers with other less expensive, faster and lower power devices which are based on another technology, but this will wait a little.

The MCU can also be programmed via JTAG if the right MCU is selected, I have suggested Atmel ATmega16, 32, 64 or 128 and TI MSP430, they both comes with JTAG interface.
 

+handheld pocket logic analyzer

I also have some other suggestions for changes to replace the opto-couplers with other less expensive, faster and cheaper devices which are based on another technology, but this will wait a little.
Do you think about optocuplers used in USB isolation?
 

xapp368.pdf

simce said:
I also have some other suggestions for changes to replace the opto-couplers with other less expensive, faster and cheaper devices which are based on another technology, but this will wait a little.
Do you think about optocuplers used in USB isolation?
Yes, I think it would be a good idea to replace them with a NVE IsoLoop IL716 and an IL717 Digital Isolators.
www.isoloop.com / www.nve.com
10 Reasons to Kick the Opto Habit: www.nve.com/products/isolators/ten.php
IsoLoop® The Opto Alternative: www.nve.com/isopdf/IsoLoop-CB.pdf
NVE IsoLoop® IL715/6/7 datasheet: www.nve.com/isopdf/il71x.pdf

Alternatively Analog Devices ADuM1401B and ADuM1402B Digital Isolators could be used, they are pin compatible with IsoLoop with additional enable pins. www.analog.com/Analog_Root/productPage/productHome/0,2121,ADUM1400,00.html
Analog Devices ADuM1400/1/2 datasheet: www.analog.com/UploadedFiles/Data_Sheets/298719227ADuM1400_1_2_a.pdf

DigiKey sells both families.
IL71x @ DigiKey: **broken link removed**
ADuM140x @ DigiKey: **broken link removed**
 

ep1k50 development board

Hi,
This is just a suggestion, I've not yet analysed this circuit...
The Idea is to create a symmetric signal directly @ the output of the ladder with two buffers in order not to use the differential amplifier. The offset tunning will be @ positive input of the upper opamp and negative input of the lower opamp.
Regards,
 

ways of designing cheap digital oscilloscopes

Why do you need two offset adjustments?
One should be sufficient.
You should just adjust one place until the differential between VINA and VINB (or inputs at VGA) is 0 volt when the input is connected to GND.

_____________________________________________________________

A similar circuit are shown in the datasheet for the MAX1180 ADC which are used in the DSO.
I think you need to have the buffer in front of the differental drivers as shown in the Maxim schematic.
Otherwise current could flow from Vref to the probe, through the resistors.

MAX4108 looks like a very good for op-amps.

**broken link removed**
The MAX4108/MAX4109/MAX4308/MAX4309 op amps combine ultra-high-speed performance with ultra-low-distortion operation. The MAX4108 is compensated for unity-gain stability; the MAX4109, MAX4308, and MAX4309 are compensated for minimum closed-loop gains (AVCL) of 2V/V, 5V/V, and 10V/V, respectively.
The MAX4108 delivers a 400MHz unity-gain bandwidth with a 1200V/µs slew rate. An ultra-low-distortion design provides an unprecedented spurious-free dynamic range of -93dBc (MAX4108) at 5MHz (VOUT = 2Vp-p, RL = 100), making these amplifiers ideal for high-performance RF signal processing.

These high-speed op amps feature a wide output voltage swing and a high-current output-drive capability of 90mA.
 

jyetech+avr+oscilloscope+input+frequency

Here's a very useful application note from Maxim:

Choosing The Optimum Buffer/ADC Combination For Your Application
This article helps the designer of a data converter system to select the proper input buffer to achieve optimum performance. Numerous parameters and their effect on data converter performance are discussed including; noise, distortion, bandwidth, settling time, gain flatness, slew rate, SFDR, current drive, offset voltage, loop gain, and output impedance.

www.maxim-ic.com/appnotes.cfm/appnote_number/702
PDF format: **broken link removed**
 

usb scope narod ru

MAX4108 - MAX4309, OPA656, OPA657 require +-5V
Then the AD8057_8 is the only remaining candidate for now.
 

monnoliv site:edaboard.com

AD8057/8 only have 28MHz 0.1dB gain flatnessat G=+1
 

oscilloscope wxwidgets

We need a FET input opamp for the buffer:
We can stay with the AD8065/AD8066
 

digital oscilloscope circuit

AD8057_8 input resistance of 10meg, 2pF, slew rate of 1000uV/s, gain flatness of 0,1dB till 28MHz. These are better characteristic than AD8065_6. As i saw only beeter characteristic to AD8065 it that it has protection diode.
 

zilog z8f0822 development board

simce said:
AD8057_8 input resistance of 10meg, 2pF, slew rate of 1000uV/s, gain flatness of 0,1dB till 28MHz. These are better characteristic than AD8065_6
But the Input bias current is too high as monnoliv wrote in the last post.
It has to be a JFET or CMOS input opamp. Both JFET and CMOS types has very low input bias current.

Maybe with should change the analog power supply instead.
TI / Burr-Brown makes some very good JFET and CMOS opamps with 75 MHz 0.1dB flattness and very high slew rate and very low input noise.
But they requiered power supply are either >= +-5Vcc (JFET) or <= +-2.75Vcc / +5Vcc (CMOS).

The DSO's +-3.3Vcc are just in between these ranges and TI doesn't make any JFET or CMOS opamps for +-3.3Vcc.
 

dso+fpga

But the Input bias current is too high as monnoliv wrote in the last post.
It has to be a JFET or CMOS input opamp. Both JFET and CMOS types has very low input bias current.
Yes, you are right, i saw only input resistance of AD8057 that is 10meg and supposed that it is qute enough for this application, but...
I was calculating:
Vin =250mV; and Ip=250mV/10MEG=25e-9 that is good value.
This is very strange for me? How can OpAmp be with 10meg input resistance and bias current of 3uA? Vin=10e+6x3e-6=30V !!!
Maybe this 10meg's are calculated for common mode and not diferential (there are no informations in datasheet about this matter)?
The DSO's +-3.3Vcc are just in between these ranges and TI doesn't make any JFET or CMOS opamps for +-3.3Vcc.
I think that PWS has to be altered in order to use external power supply (from battery or mains adaptor). I think that on some laptop computers USB driver won't supply enough power when computer is supplied from its battery. Or power save modes has to be altered on computer. I had similar problem using external HDD through USB2.0. When computer is powered from mains power no problems are present, but when computer is battery powered usb driver does not activate hdd after enumeration.
 

pc oscilloscope circuit schematic

This is very strange for me? How can OpAmp be with 10meg input resistance and bias current of 3uA? Vin=10e+6x3e-6=30V !!!
Maybe this 10meg's are calculated for common mode and not diferential (there are no informations in datasheet about this matter)?
You should just consider that it's a bias current, like the bias current of a bipolar transistor. The impedance of 10Meg is a small signal impedance that occur when the input is biased correctly.
 

lmx9838 project

simce said:
I think that PWS has to be altered in order to use external power supply (from battery or mains adaptor). I think that on some laptop computers USB driver won't supply enough power when computer is supplied from its battery. Or power save modes has to be altered on computer. I had similar problem using external HDD through USB2.0. When computer is powered from mains power no problems are present, but when computer is battery powered usb driver does not activate hdd after enumeration.

Wouldn't it be just as easy to connect the mains adaptor to your Laptop as it would be to add a mains adaptor to the DSO in this case:?:
Then you don't need to have an extra mains adaptor and your Laptop would be charged at the same time.
Normally USB is specified to deliver 500mA at a port.

Anyway, it is planned to make a handheld version with LCD later, so you don't have to connect the DSO to an PC. This version will of couse also have rechargable battery.
But I think we should wait to focus on thisuntil some of the other problems are solved.
 

pic oscillospoe design

Normally USB is specified to deliver 500mA at a port
Yes i know but sometimes USB driver can refuse high power requrements, more often if you have another device on USB port(mouse, keyboard or....).

But I think we should wait to focus on thisuntil some of the other problems are solved.
I'm focusing on input amplifier. If we use other power supply we can deliver +/-5V on opamps that have better characteristics.
 

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