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Bandbap refererence issue

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Areky_qin said:
BTY, we have designed a bandgap with a op, the simulation result is very good, just as the power supply range, temperature characteristic, but when we test the chip,the bandgap block not work, so i think there r more things to think about, not only some paper can show all the information, tape-out and test results show all.
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Yes, I agree that there are more things need to be considered in real situations. So, for your case, what is the probem of the bandgap block? Do you find out the reasons finally?
 

Areky_qin said:
BTY, we have designed a bandgap with a op, the simulation result is very good, just as the power supply range, temperature characteristic, but when we test the chip,the bandgap block not work, so i think there r more things to think about, not only some paper can show all the information, tape-out and test results show all.
Click to expand...

Hi Areky_qin,

did u consider the package parasitics before fabricating the IC.
 

The bandgap with OTA is a good selection, They can guarantee the output accuracy
 

pillar_chen said:
The bandgap with OTA is a good selection, They can guarantee the output accuracy
Click to expand...

Against process variation, typically there are offset voltage in the OTA which would cause the initial voltage shift also. I agree that the output accuracy is good against supply dependence, temperature coefficient but I think this approach may not be good against process variation, agree?
 

dennislau wrote
Against process variation, typically there are offset voltage in the OTA which would cause the initial voltage shift also. I agree that the output accuracy is good against supply dependence, temperature coefficient but I think this approach may not be good against process variation, agree?
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Please see attached figure for example, the opamp gain ~ 20dB, pretty low. How much would its input offset voltage hurt, 10mV???

When we talk about 1.2V+/-70mV result out of silicon, is there other major cause of process variation. From
Code: 
Vref=Vbe+ (kT/q) x (lnN) x (R2/R1)
what could be it? <Vbe> variation,? <N> mismatch?

Any document / reference material to deal with this issue???
 

Dear All,

Can Any one of you explain me What's a bangapp, and charge pump. please !
thanks for all of you.

gafsos
 

This books explains lots of pratical consideration including the error sources and second order curvature compensation techniques. Hope that helps
 

Areky_qin said:
BTY, we have designed a bandgap with a op, the simulation result is very good, just as the power supply range, temperature characteristic, but when we test the chip,the bandgap block not work, so i think there r more things to think about, not only some paper can show all the information, tape-out and test results show all.
Click to expand...

yeah,it's truth ! didn't you add a start up circuit for the bandgap ?

if so , i want to know why the chip didn't work ！
 

Chethan said:
dennislau said:
holddreams said:
How will you start to design the bandgap circuit?

How to determin the two resistors used in bandgap circuit?

I run a .tran simulation ,and at the same time sweep the temperature, but the bandgap output is decreasing as the temperature increase, How to solve this problem?Does it mean that the two resistors I used are wrong?

Thx.
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Usually, in the conventional bandgap circuit design, we can use the equation Vref=Vbe+ (kT/q) x (lnN) x (R2/R1) to calculate the two resisors value where N typically chosen to be 8 or 24 from matching point of view .

It is mentioned that the bandgap output is decreasing as the temperature increase. Could you tell us how much it decrease?
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Hi,
The BGR i have designed has the temperature plot as shown in the figure. The reference voltage drastically decreases as the temperature increases. can some one please tell me how should i compensate it.

thanx in advance
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Hi,

have you tried making the zero TC point to be at the midle of temperature range?

If the problem is not solved even then, try using resistors with -ve temperature coefficients.
 

bandgap with opamp provides better DC and low to intermediate frequency supply noise rejection. for high frequency noise, put decoupling cap on your bandgap voltage node (which of course cost area).

how does one deal with the process variation of the Vbe voltage? it basically shifts the bandgap curve up and down for different corners.
 

And, does anyone suggest some topology which has good performance against the process variation or with accurate initial bandgap voltage without trimming?
Click to expand...

Try the following topology to avoid trimming:
 

how to analysis the stability of the ref? and how to compensate it? hope for some advice.THX in advance.
 

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