mhytr
Member level 3
qam matlab
Hi,I am trying to design the timing recovery loop in the QAM demodulator.If i have finished the algorithm design of the loop,then how can i verify my design in the matlab/simulink?How can i get the proper input I/Q data and the right output data,which can be used to verify my verilog implementation?
Thanks!
Hi,I am trying to design the timing recovery loop in the QAM demodulator.If i have finished the algorithm design of the loop,then how can i verify my design in the matlab/simulink?How can i get the proper input I/Q data and the right output data,which can be used to verify my verilog implementation?
Thanks!