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Is metal and std cell fill required?

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jelydonut

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Is it required to perform metal and cell fill after routing?
What are the advantages/disadvantages of doing this, and when should it be considered or avoided?

jelydonut
 

Filler cells provide decoupling capacitance or complete the power connections in the standard cell rows.Fillers are added at the end of the design cycle.

Metal fill is electrically inactive metal that fills open areas on each metal layer. This serves to
minimize variations in the metal thickness, resulting in a more even distribution of the
dielectric and improved chip performance.
 

mediative is right.
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>>>What are the advantages/disadvantages of doing this, and when should it be considered or avoided?

Both of them are MUST.
So instead of considering what's the "advantage" or the "disadvantage",
one should take care is how to add them efficiently.

Especially, it need to add metal fill properly to minimize the impact on timing.
 

One of the main reason for metal filling is because of process requirement. CMP(Chemical Mechanical Polishing) is now normally used for 0.5 micron and below process. This process step is to achieve planarity. Thus every fab would require a certain level of metal density to ensure Effective CMP, if your design do not have enough certain level of metal, then you are required to do filling to meet the required density.
 

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