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SPI flash instead of parallel flash to bootload user code on a NIOS processor

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jdhar

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I was wondering if anyone had used SPI flash instead of parallel flash to bootload user code on a NIOS processor? THey have plenty of documentation on how to use GERMS with a parallel flash, however, I'm designing a new board, and serial flash will save me a LOT of pins. Is it possible/practical to do this? Can a parallel->serial interface be written and still meet the requirements for booting?
 

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