etherios
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usart atmega16
Ok i am using a STK500 with an atmega16 and for debugging a JTAGICE mkII. I use assembly language.
I have observed the following
a. I cannot see the content of baud rate registers (UBRRH+UBRRL). It seems to be empty.
b. I have to re-initialise the UBRR every time i have to write a byte to USART. To be more precise i have to write the following code
LOOP:
ldi r16,0x00
out UBRRH,r16
ldi r16,0x19
out UBRRL,r16
out UDR,r17
jmp LOOP
and not
ldi r16,0x00
out UBRRH,r16
ldi r16,0x19
out UBRRL,r16
LOOP:
out UDR,r17
jmp LOOP
which seems more reasonable
anyone has an idea what is going on? I am using the 4MHZ internal clock
Ok i am using a STK500 with an atmega16 and for debugging a JTAGICE mkII. I use assembly language.
I have observed the following
a. I cannot see the content of baud rate registers (UBRRH+UBRRL). It seems to be empty.
b. I have to re-initialise the UBRR every time i have to write a byte to USART. To be more precise i have to write the following code
LOOP:
ldi r16,0x00
out UBRRH,r16
ldi r16,0x19
out UBRRL,r16
out UDR,r17
jmp LOOP
and not
ldi r16,0x00
out UBRRH,r16
ldi r16,0x19
out UBRRL,r16
LOOP:
out UDR,r17
jmp LOOP
which seems more reasonable
anyone has an idea what is going on? I am using the 4MHZ internal clock