Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Sync Reset or Async Reset

Status
Not open for further replies.
V

virgorabbit

Junior Member level 3
Joined
Nov 29, 2004
Messages
30
Helped
2
Reputation
4
Reaction score
0
Trophy points
1,286
Activity points
328
In SoC design, which one is better, Sync Reset or Async Reset?
 

I think asnc reset is better, because reset need not clock to function.

sync reset need clock to function.




virgorabbit said:
In SoC design, which one is better, Sync Reset or Async Reset?
Click to expand...
 

asynchronous reset would be better for high performance,
 

prefer Async Reset in SoC
 

async reset is best since it can bring back your ckt to a known state in case of error and during power up
 

and asyn can benifit you dft structure
 

Sync. reset needs supplemental logics (usually AND gates). So it causes overhead problem in term of area.

Async. reset doesn't need supplemental logics but it maybe encounters the metastable situations.

Sometimes we use sync. reset, the other times we use async. reset. However, it is better (my opinion) if we use async. reset due to many overheads.
 

May I know how to use reset synchronizer to avoid metastability of asynchronized reset?
 

Hi

See the following paper on synch and asynch resets and decide which one to use

h**p://www.sunburst-design.com/papers/CummingsSNUG2002SJ_Resets.pdf

Hope this helps!
 

Hi,
you can refer "DIGITAL DESIGNS" by John F. Wakerly .
 

where can i find "DIGITAL DESIGNS" by John F. Wakerly .?
thanks!
 

u beter choose asyn reset because your chip must be set to intial state when reset is applied . its like an interrupt and used in critical position so it should not depend on other signal like clock so prefer asyn reset
 

gogogo said:
where can i find "DIGITAL DESIGNS" by John F. Wakerly .?
thanks!
Click to expand...

Hi gogogo,
I don't know if it is on internet. But you can always purchase it :)

Best Regards
 

use async reset is better than using sync reset .
 

ragabs said:
use async reset is better than using sync reset .
Click to expand...

Hi

I have heared this term many times.

Would you please disscuss your opinion in technical language or scientific reasons?


tnx
 

ASYNC is better, because it need not clock to function.

best regards



virgorabbit said:
In SoC design, which one is better, Sync Reset or Async Reset?
Click to expand...
 

jimjim2k said:
Hi

I have heared this term many times.

Would you please disscuss your opinion in technical language or scientific reasons?


tnx
Click to expand...

Hi jimjim2k,
Refer to this document. This is the best document i have come accross regarding synchronous and asynchronous resets. Hope this helps.

Best Regards,
 

bigyellow said:
asyn, use reset synchronizer to avoid metastability
Click to expand...

Dear Sir,

Can you explain more detail about your answer?
I don't understand why reset synchronizer can avoid metastability.
Thanks.
 

best is to have async assertion and sync de-assertion. this is the best. this can be acheived using a reset synchronizer. pls refer the paper and u will come to know the full concepttold here
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top