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Dynamic Threshold Compensation technique for UHF rectifiers

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bwarlord01

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Hi, anyone know how the highlighted circuit below acts as a Dynamic Threshold Compensator for PMOS transistors? this is implemented in 65nm CMOS technology. And, i don't understand why the source terminal of the Diode-connected transistor (NMOS) is connected to the ground. Please i really need your help.

Below is the attached image of the circuit:
decoy.JPG
 

bwarlord01 said:
And, i don't understand why the source terminal of the Diode-connected transistor (NMOS) is connected to the ground.
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It acts as bias resistor.

NMOS is a triple-well.

For PMOS on state, it feeds ground potential.
For PMOS off state, it feeds Vout potential.

However RF loss to substrate exists.
 

is it a good thing for a design in rectifier?
 

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