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  1. #1
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    Circuit protection with VHDL code

    Hi guys,

    I need help with a code i trying to write.

    I have I2C communication between my board(FPGA) and the embedded CPU.
    To activate some load we need to write 14bit register to the FPGA.
    I have 7 loads. Each load consume almost 1.2A.(I have 2A fuse )
    I do it with H bridge topology on my circuit.
    The switching duration is almost 100ms.

    I want to write a code that will protect my circuit from activating 2 or more loads together.
    I try to do it by comparing the new value with the old value and adding a delay. but i didn't succeed

    I need your experience and your knowledge to give me some ideas how to make it work.

    Thx u a lot!!!

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    Re: Circuit protection with VHDL code

    Hi,

    Itīs not clear if you speak about FPGA (VHDL) code or microcontroller code.
    (If VHDL...I wonder why you mentioned the microcontroller)

    You need to decide (and describe) what happens when two or more loads ar activated at the same time.
    Is there some priority for the loads? In a way that only the two loads with the higher priority are activated, while the others stay OFF.
    Or - the easier case: donīt activate any load at all in case of more than two are tried to be activated.

    there are a lot of cases to care about.
    1 case: all OFF
    7 cases: only one output activated
    21 cases: with two outputs activated
    99 cases: when more than two are activated
    (128 in total)

    Show what you have done so far. This shows your effort and motivates users to respond.

    Klaus
    Please donīt contact me via PM, because there is no time to response to them. Thank you.



    •   Alt6th December 2017, 09:19

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  3. #3
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    Re: Circuit protection with VHDL code

    Thx KlausST.

    When Two or more loads will activate together the power consumption will be high and the fuse will be burn---> thus I want to activate only one load e
    There is not priority for the loads.

    "donīt activate any load at all in case of more than two are tried to be activated."
    Its not easy for me...

    I write down only the first two MSB of the loads register.
    I put some notes in the relevant lines.
    Code VHDL - [expand]
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    IF (LOAD_STATUS(13 DOWNTO 12)/=LOAD_REG(13 DOWNTO 12)) THEN ------ FIRST 2 BIT OF THE REGISTER TO ACTIVATE THE LOAd
              CASE LOAD_REG(13 DOWNTO 12) IS
                   WHEN "01" =>
                        LOAD1_OUT   <= "0101";------------ 2 H-bridges hence we have 4 bit register
                        
                   WHEN "10" => 
                        LOAD1_OUT   <= "1001";
                        
                   WHEN "11" =>
                        LOAD1_OUT   <= "0110";
                        
                   WHEN OTHERS =>
                        LOAD1_OUT <= "0000";
               END CASE;
               LOAD1_TIMER_EN <= '1';          
           ELSIF LOAD_TIMER_END='1' THEN   ------- 100 ms counter for the load pulse. the counter in other process.
               LOAD1_TIMER_EN <= '0';
               LOAD1_OUT    <= "0000";
           END IF;

    Thx a lot!
    Last edited by ads-ee; 7th December 2017 at 16:50. Reason: added missing tags



    •   Alt6th December 2017, 11:18

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  4. #4
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    Re: Circuit protection with VHDL code

    Hi,

    Iīd use an ADDER to add all "1" in your register. If result >2 then there is an error.
    Or a counter, that counts all "1" in oyur register.
    You may start the ADDER or COUNTER after a new value is written to the register.

    14 bits, each bit has the value of "1" (not 2, 4, 8, 16...)

    Klaus
    Please donīt contact me via PM, because there is no time to response to them. Thank you.


    1 members found this post helpful.

    •   Alt6th December 2017, 11:29

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    Re: Circuit protection with VHDL code

    Thx a lot Klaus.

    If i understood u suggest to add adder of '1' and compare it to each bit of the register load..?
    It will be very tedious

    Result >2?

    Sorry i didn't understand...
    If I add each bit 1 it never could be greater from 2(max 2)
    One more things, counter for '1'-es, case statement will be the best way to do it..? (need 14 clks for that, I have 50MHz clk on board)

    Sorry if I have missed something...

    Again, Thx u a lot!!!!



  6. #6
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    Re: Circuit protection with VHDL code

    Hi,

    you have a 14 bit register. Count all "1" within this register. (result may be 0..14)

    IF the result >2 then the the output is not valid.

    Pseudo code:
    * count =0
    * for b = 0 to 13 {
    * if bit(b) of register = 1 then count = count +1
    * }
    * if count >2 then all outputs OFF

    ****
    There are many other approaches. Like adders as combinational logic...

    Klaus
    Please donīt contact me via PM, because there is no time to response to them. Thank you.


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  7. #7
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    Re: Circuit protection with VHDL code

    It will not work..
    I will explain.

    I have 14 bit register( 7 loads, 2 bit for each load).

    Supposed i will write 0x0005 it's meaning i will activate 2 loads, and i have 2 "ones".
    In this situation my VHDL code will not enable the output because counter >2 means erro.

    But we have 0x0003 situation ("0110" output see the code above) also we have 2 "ones" and here we can and most to enable the output.

    Wow, i'm so tired

    I really need to think about solution



  8. #8
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    Re: Circuit protection with VHDL code

    Hi,
    Wow, i'm so tired
    it seems so.

    Supposed i will write 0x0005 it's meaning i will activate 2 loads, and i have 2 "ones".
    In this situation my VHDL code will not enable the output because counter >2 means erro.
    no. Because 2 is NOT >2. --> the output will be enabled.

    But you say you have two bit for one load.
    The you have four states for one load: 00, 01, 10, 11.
    At which of these four states the load is enabled?

    I assume 01 and 10 --> then use an XOR on these two bits.
    The output of the XOR tells you "load enabled"

    Now you need 7 XOR. Giving 7 outputs.

    Now just do the same as in the above pseudo code, but count from 0 to 6 ....for the 7 XOR outputs.

    Klaus
    Please donīt contact me via PM, because there is no time to response to them. Thank you.


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  9. #9
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    Re: Circuit protection with VHDL code

    Thx you a lot Klaus.

    01, 10 and 11 are the states the load is enabled( see above the code i were write)
    XOR were good in the states you mention(01,10).

    If will add one more bit to the register for "busy" state, it will complicated my design?



    •   Alt10th December 2017, 09:36

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  10. #10
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    Re: Circuit protection with VHDL code

    Hi,

    01, 10 and 11 are the states the load is enabled( see above the code i were write)
    Sorry, I can't see this in your code.

    But if 01, 10, 11... then simply use an OR gate instead of XOR.

    If will add one more bit to the register for "busy" state, it will complicated my design?
    You really think that adding a bit will make your FPGA design significantly more complicated...

    Klaus
    Please donīt contact me via PM, because there is no time to response to them. Thank you.



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