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    Dummy Generation in Cadence

    Hi,

    Can anyone suggest how to generate dummies after finishing the layout? I have some spaces in the die and this need to be filled by dummies, metal or any other layers. Any hint on this would help a lot

    I am using Diva tool in Cadence Virtuoso

    •   Alt11th November 2017, 18:43

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    Re: Dummy Generation in Cadence

    In my last employment (and previously) the layout dudes
    had a script to auto-generate fills. Wasn't something they
    left to circuit designers. Some foundries want to do the
    fill job themselves, with fabless customers, and will just
    do it and punt you back a final verification layout database.

    I preferred to place my own by hand so as to have more
    control over parasitics and so on. I also like to "fill" with
    unconnected FETs sometimes, which will prune out for LVS
    but give you a metal-levels-only circuit modification ability
    (just on the off chance that some surprise is coming).
    On many occasions I've had to make modified fill cells
    for reasons such as needing to avoid certain layers
    that are congested, but needing to fill the rest still.

    The C5 kit may or may not contain a blessed density fill
    element (looking like a stack of N+/P+, active, contact,
    and various metals). Sometimes I make plate caps that
    contribute to density, and set them under the power
    busses (for example, M2/M1/poly/active*N+ caps add a
    lot of density plus clean up on-chip supply rails).

    If you find the fill cell (or create one that does the density
    job) then placing it as arrays (x, y # properties) makes it
    not so terribly tedious.


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    Re: Dummy Generation in Cadence

    As said, "Tiling" is generated by automated scripts.This is generally supplied by Library Guys..
    You can also write a such script if you work ..


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    Re: Dummy Generation in Cadence

    I have seen various way of generating metal fill:

    - foundry-provided scripts
    - home-grown scripts
    - 3rd party tools, like SkillCAD (www.skillcad.com)
    - manual - typical for analog / sensitive designs


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    Re: Dummy Generation in Cadence

    Can I just used M3 to fill all spaces? also from where I can get the information of how much empty space can be accepted by the technology and MOSIS?
    because no such information available in the DRC of the PDK I have, also MOSIS advised that they don't do dummy filling. So, I want to do it manually and I want use only M3 (top metal in my process)



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    Re: Dummy Generation in Cadence

    Using only M3 will not satisfy the other mask levels' density
    limits (expect C5 is old enough that maybe you only have
    min and not max density rules, but can't say for sure).

    If you have a max as well as a min then you need to make
    a unit fill cell that has enough "white space" to make sure
    that locally the max density is not exceeded.

    There are two reasons for density limits.

    One is lithography process needs, things like field loading
    during etch produces variation in over-/under-etch from
    the drawn feature,

    The other is for aligner function. Auto-align works in a
    small area looking for features it can "work with". An
    all-empty or an all-filled region can make the aligner fail
    to do its job. Then people in bunny suits get all sad.

    And this is a concern at every mask layer along the way.


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    Re: Dummy Generation in Cadence

    I think metal fill should be generated for all layers as required by the technology (design rule manual), and not just in one metal layer.


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    •   Alt16th November 2017, 23:48

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    Re: Dummy Generation in Cadence

    Quote Originally Posted by bio_man View Post
    Can I just used M3 to fill all spaces? also from where I can get the information of how much empty space can be accepted by the technology and MOSIS?
    because no such information available in the DRC of the PDK I have, also MOSIS advised that they don't do dummy filling. So, I want to do it manually and I want use only M3 (top metal in my process)
    read the DRM carefully, there are density rules for most if not all layers. doing it by hand is laborous, impossible for modern technologies and chip sizes.
    Really, I am not Sam.


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    Re: Dummy Generation in Cadence

    Quote Originally Posted by ThisIsNotSam View Post
    read the DRM carefully, there are density rules for most if not all layers. doing it by hand is laborous, impossible for modern technologies and chip sizes.

    DRM? you mean Design Rule Manual?

    - - - Updated - - -

    So, you think if I use all metal layers as timof suggested would that be OK?



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    Re: Dummy Generation in Cadence

    Quote Originally Posted by bio_man View Post
    DRM? you mean Design Rule Manual?

    - - - Updated - - -

    So, you think if I use all metal layers as timof suggested would that be OK?
    Just read the rules, you will very quickly understand which layers need filling. Sometimes it is all metals and vias, sometimes is all but one, sometimes device layers need filling too. Go read the damn thing.
    Really, I am not Sam.


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    Re: Dummy Generation in Cadence

    There is quite likely a rules set for density which will
    happily tell you where you've fallen short. May be a
    checkbox, may be a separate runset depending on kit
    structure. This embodies the DRM's guidance and is
    what the foundry will criticize your database to,
    directly.


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    Re: Dummy Generation in Cadence

    Quote Originally Posted by ThisIsNotSam View Post
    Just read the rules, you will very quickly understand which layers need filling. Sometimes it is all metals and vias, sometimes is all but one, sometimes device layers need filling too. Go read the damn thing.
    still don't know what is the document you are pointing to ? is it Design Rules manual? I attached the Design rule document for SCMOS which I already read, and there is no information about the dummy filling requirements. There is only a minimum density rule which I attach also here. Does this mean this old technology may not require Dummy filling?

    - - - Updated - - -

    Quote Originally Posted by dick_freebird View Post
    There is quite likely a rules set for density which will
    happily tell you where you've fallen short. May be a
    checkbox, may be a separate runset depending on kit
    structure. This embodies the DRM's guidance and is
    what the foundry will criticize your database to,
    directly.
    you mean during the DRC check? I have checked all DRC rules both in Cadence and the manual to make sure they are matched, and there is no rule for checking the max density or require dummy filling.

    bear with me guys, this is my first IC and I don't have experience other that reading the documents, youtube and this forum. Now, this is my last step because my layout is ready for submission to MOSIS but not sure about these dummies thing !!



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    Re: Dummy Generation in Cadence

    From this design rule manual:

    4. Minimum Density Rule
    Many fine-featured processes utilize CMP (Chemical-Mechanical Polishing) to achieve
    planarity. Currently, for MOSIS, the ON Semi 0.50 micron and all the 0.35 micron (and
    smaller) processes are in this category. Effective CMP requires that the variations in
    feature density on layer be restricted.
    See the following for more details.


    But, I do not see any "details" in "the following".
    The DRM seems incomplete - what layers should conform to the density rules, what are the minimum and maximum densities, etc.


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    •   Alt19th November 2017, 20:37

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    Re: Dummy Generation in Cadence

    Usually density filling - at least for process sizes > 0.1µm - is done by the foundry before mask prep.

    Suggest to ask MOSIS about the right procedure.


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    Re: Dummy Generation in Cadence

    Quote Originally Posted by timof View Post
    From this design rule manual:

    4. Minimum Density Rule
    Many fine-featured processes utilize CMP (Chemical-Mechanical Polishing) to achieve
    planarity. Currently, for MOSIS, the ON Semi 0.50 micron and all the 0.35 micron (and
    smaller) processes are in this category. Effective CMP requires that the variations in
    feature density on layer be restricted.
    See the following for more details.


    But, I do not see any "details" in "the following".
    The DRM seems incomplete - what layers should conform to the density rules, what are the minimum and maximum densities, etc.
    yes, that's my concern but this is the only DRM document I have been provided.

    - - - Updated - - -

    Quote Originally Posted by erikl View Post
    Usually density filling - at least for process sizes > 0.1µm - is done by the foundry before mask prep.

    Suggest to ask MOSIS about the right procedure.
    I asked them and they advised me that they don't do it even for 0.5um process!

    I am thinking to go ahead and submit and wait for the manufacturing review, hoping they ask for detailed corrections



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    Re: Dummy Generation in Cadence

    It looks like you should proceed with the submission then. And don't be surprised if the information MOSIS gives you is wrong, they are just the middle man between you and the foundry.
    Really, I am not Sam.


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