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  1. #1
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    Latches create in verilog code

    i create 1d array in verilog code like this

    Code Verilog - [expand]
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    reg[7:0]  channel[1:length-3];
    integer i ;
     
    initial 
     begin
      for (i = 1 ; i <= length-3 ; i = i+1)
       begin
        channel[i] = i * 10;
       end
     end

    now in always blocks i am comparing some input logic like this

    Code Verilog - [expand]
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    always@ (posedge clk or posedge rst )
         begin  
         if (rst)
          begin
                 cts_1 = 11'bz ;
             cts_2 = 11'bz ;
             cts_3 = 11'bz ;
             cts_4 = 11'bz ;
             cts_5 = 11'bz ;
             cts_6 = 11'bz ;
             cts_7 = 11'bz ;
             cts_8 = 11'bz ;
             count = 1 ;
             count1 = 0 ;
         end  
        else
             begin
            if( user[1:3] == 3'b000 &&  count1[0]!=1 )   //Count1---only one time access only
                 begin
                  cts_1= {3'b000,channel[count]};
                  count=count+1;
                  count1[0]=1;
                 end
                else
              begin         
                  cts_1 = cts_1;
                 end

    the line "cts_1= {3'b000,channel[1]};" give latches

    now question is how to remove latches. and why this line create latches
    Last edited by andre_teprom; 3rd November 2017 at 07:51. Reason: added SYNTAX tags

    •   Alt3rd November 2017, 06:03

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  2. #2
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    Re: latches create in verilog code

    Because you are using blocking assignments.
    Use non-blocking ( <= ) assignment instead.

    Also, why are you resetting all the values to z?



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    Re: latches create in verilog code

    Blocking assignments in edge sensitive always block is surely bad design practice (don't consider special cases where they are intentionally used). But I don't understand how they could cause latch generation in this case.

    I rather guess the posted code is somehow "like" the original code but essentially different. It would be a good idea to report the respective synthesis warning exactly, and to post complete entity code including variable definitions, so that we can compile it for test.


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    •   Alt3rd November 2017, 09:44

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  4. #4
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    Re: latches create in verilog code

    the initial block may have some issues -- I know some tools will accept this as a warning. Using integer types in an initial block can result in the synthesis ignoring this. If that is an issue, use generate and genvar.

    I also don't see any latches here. My suspicion is that a different file is being used in synthesis or there is some other issue with the original post.

    last, "cts_1 = cts_1;" is not needed.


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  5. #5
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    Re: latches create in verilog code

    i know that else statement is not necessary but it actually sure that not to create latches. because missing if else statement cause latches... i also initialize cts with zero but same warning show.

    the complete code is
    Code:
    module channel_selector(user,rst,clk,cts_1,cts_2,cts_3,cts_4,cts_5,cts_6,cts_7,cts_8);
    
    parameter length = 11;
    
    output reg [1:length]cts_1,cts_2,cts_3,cts_4,cts_5,cts_6,cts_7,cts_8;
    
    input [1:(length-3)*3]user;
    input clk,rst;
    
    reg [7:0] count1 =0;
    reg [7:0]  channel[length-4:0];
    reg [1:length-3] count = 0;  
    
    integer i ;
    initial 
     begin
      for (i = 0 ; i <= length-4; i = i+1)
       begin
        channel[i] = i * 10;
       end
     end
     
     
       always@ (posedge clk or posedge rst )
    	 begin 	 
    	 if (rst)
    	  begin
    	    cts_1 =  0 ;
    		 cts_2 = 11'bz ;
    		 cts_3 = 11'bz ;
    		 cts_4 = 11'bz ;
    		 cts_5 = 11'bz ;
    		 cts_6 = 11'bz ;
    		 cts_7 = 11'bz ;
    		 cts_8 = 11'bz ;
    	  	 count = 0 ;
    		 count1 = 0 ;
         end  
       	else
    		 begin
          	if( (user[1:3] == 3'b000) && (count1[0]!=1) )   //Count1---only one time access only
    			 begin
    			  cts_1 = {3'b000,channel[count]};
    			  count=count+1;
    		 	  count1[0]=1;
    			 end
    			else
              begin			
    			  cts_1 = cts_1;
    			 end
    			 if( (user[4:6] == 3'b001)  &&  (count1[1]!=1) )
    			 begin
    			  cts_2 = {3'b001,channel[count]};
    			  count=count+1;
    			  count1[1]=1;
    			 end
    			 else
              begin			
    			  cts_2 = cts_2;
    			 end
    			 
    			 if( user[7:9] == 3'b010    &&  count1[2]!=1  )
    			 begin
    			  cts_3 = {3'b010,channel[count]};
    			  count=count+1;
    			  count1[2]=1;
    			 end
    			 else
               begin			
    			   cts_3 = cts_3;
    			  end
    			 
    			 if( user[10:12] == 3'b011    &&  count1[3]!=1 )
    			  begin
    			  cts_4 = {3'b011,channel[count]};
    			  count=count+1;
    			  count1[3]=1;
    			  end
    			 else
               begin			
    			   cts_4 = cts_4;
    			  end
    			 
    			 if( user[13:15] == 3'b100   &&  count1[4]!=1  )
    			  begin
    			  cts_5 = {3'b100,channel[count]};
    			  count=count+1;
    			  count1[4]=1;
    			  end
    			 else
               begin			
    			   cts_5 = cts_5;
    			 end
    			 
    			 if( user[16:18] == 3'b101    &&  count1[5]!=1  )
    			 begin
    			  cts_6 = {3'b101,channel[count]};
    			  count=count+1;
    			  count1[5]=1;
    			 end
    			 else
               begin			
    			   cts_6 = cts_6;
    			  end
    			 
    			 if( user[19:21] == 3'b110    &&  count1[6]!=1 )
    			 begin
    			  cts_7 = {3'b110,channel[count]};
    			  count=count+1;
    			  count1[6]=1;
    			 end
    			 else
               begin			
    			   cts_7 = cts_7;
    			 end
    			 
    			 if( user[22:24] == 3'b111 &&  count1[7]!=1  )
    			 begin
    			  cts_8 = {3'b111,channel[count]};
    			  count=count+1;
    			  count1[7]=1;
    			 end
    			 else
               begin			
    			   cts_8 = cts_8;
    			  end
    
     		end
    	
     	 end
    	
    endmodule
    i know else statement is not necessary but it actually sure that not to create latches because missing if else statement might cause latches. I also initialize cts_1... with zero but same warning again show

    the warning show is

    WARNING:Xst:1781 - Signal <channel> is used but never assigned. Tied to default value.
    WARNING:Xst:1710 - FF/Latch <Mtridata_cts_8_10> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_8_9> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_8_8> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_7_10> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_7_9> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_7_8> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_6_10> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_6_9> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_6_8> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_5_10> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_5_9> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_5_8> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_3_10> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_3_9> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_3_8> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_4_10> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_4_9> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_4_8> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_4<8> and Mtridata_cts_4<9> Mtridata_cts_4<9> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_4<10> and Mtridata_cts_3<8> Mtridata_cts_3<8> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_4<8> and Mtridata_cts_3<9> Mtridata_cts_3<9> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<8> and Mtridata_cts_3<10> Mtridata_cts_3<10> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<10> and Mtridata_cts_5<8> Mtridata_cts_5<8> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<10> and Mtridata_cts_5<9> Mtridata_cts_5<9> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<9> and Mtridata_cts_5<10> Mtridata_cts_5<10> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<9> and Mtridata_cts_6<8> Mtridata_cts_6<8> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<10> and Mtridata_cts_6<9> Mtridata_cts_6<9> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<9> and Mtridata_cts_6<10> Mtridata_cts_6<10> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<10> and Mtridata_cts_7<8> Mtridata_cts_7<8> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<9> and Mtridata_cts_7<9> Mtridata_cts_7<9> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<9> and Mtridata_cts_7<10> Mtridata_cts_7<10> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<9> and Mtridata_cts_8<8> Mtridata_cts_8<8> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<9> and Mtridata_cts_8<9> Mtridata_cts_8<9> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<9> and Mtridata_cts_8<10> Mtridata_cts_8<10> signal will be lost.
    WARNING:Xst:2404 - FFs/Latches <Mtridata_cts_3<10:10>> (without init value) have a constant value of 0 in block <channel_selector>.
    WARNING:Xst:2404 - FFs/Latches <Mtridata_cts_4<10:10>> (without init value) have a constant value of 0 in block <channel_selector>.
    WARNING:Xst:1710 - FF/Latch <Mtridata_cts_6_8> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_6_9> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_6_10> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_5_8> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_5_9> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_5_10> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_7_8> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_7_9> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_7_10> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_8_8> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_8_9> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_8_10> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_3_8> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_3_9> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_4_8> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_4_9> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_6<8> and Mtridata_cts_6<10> Mtridata_cts_6<10> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_6<9> and Mtridata_cts_5<8> Mtridata_cts_5<8> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_5<8> and Mtridata_cts_5<9> Mtridata_cts_5<9> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_6<10> and Mtridata_cts_5<10> Mtridata_cts_5<10> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_5<8> and Mtridata_cts_7<8> Mtridata_cts_7<8> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_5<10> and Mtridata_cts_7<9> Mtridata_cts_7<9> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_5<10> and Mtridata_cts_7<10> Mtridata_cts_7<10> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_5<10> and Mtridata_cts_8<8> Mtridata_cts_8<8> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_5<10> and Mtridata_cts_8<9> Mtridata_cts_8<9> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_5<10> and Mtridata_cts_8<10> Mtridata_cts_8<10> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_5<8> and Mtridata_cts_3<8> Mtridata_cts_3<8> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_5<10> and Mtridata_cts_3<9> Mtridata_cts_3<9> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<9> and Mtridata_cts_4<8> Mtridata_cts_4<8> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<9> and Mtridata_cts_4<9> Mtridata_cts_4<9> signal will be lost.
    WARNING:Xst:1710 - FF/Latch <Mtridata_cts_6_0> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_6_7> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_5_0> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_5_7> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_7_0> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_7_7> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_8_0> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_8_7> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_3_0> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_3_7> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_4_0> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <Mtridata_cts_4_7> (without init value) has a constant value of 0 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<8> and Mtridata_cts_6<0> Mtridata_cts_6<0> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<8> and Mtridata_cts_6<7> Mtridata_cts_6<7> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<8> and Mtridata_cts_5<0> Mtridata_cts_5<0> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<8> and Mtridata_cts_5<7> Mtridata_cts_5<7> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<8> and Mtridata_cts_7<0> Mtridata_cts_7<0> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<8> and Mtridata_cts_7<7> Mtridata_cts_7<7> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<8> and Mtridata_cts_8<0> Mtridata_cts_8<0> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<8> and Mtridata_cts_8<7> Mtridata_cts_8<7> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<8> and Mtridata_cts_3<0> Mtridata_cts_3<0> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<0> and Mtridata_cts_3<7> Mtridata_cts_3<7> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<0> and Mtridata_cts_4<0> Mtridata_cts_4<0> signal will be lost.
    WARNING:Xst:638 - in unit channel_selector Conflict on KEEP property on signal Mtridata_cts_3<0> and Mtridata_cts_4<7> Mtridata_cts_4<7> signal will be lost.
    WARNING:Xst:2677 - Node <count_5> of sequential type is unconnected in block <channel_selector>.
    WARNING:Xst:2677 - Node <count_4> of sequential type is unconnected in block <channel_selector>.
    WARNING:Xst:2677 - Node <count_3> of sequential type is unconnected in block <channel_selector>.
    WARNING:Xst:2677 - Node <count_2> of sequential type is unconnected in block <channel_selector>.
    WARNING:Xst:2677 - Node <count_1> of sequential type is unconnected in block <channel_selector>.
    WARNING:Xst:2042 - Unit channel_selector: 11 internal tristates are replaced by logic (pull-up yes): N10, N11, N12, N13, N14, N15, N16, N17, N18, N19, N20.
    Last edited by andre_teprom; 4th November 2017 at 00:07. Reason: added quote tags



  6. #6
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    Re: Latches create in verilog code

    As previously guessed, the "complete code" doesn't create latches.

    You are essentially misunderstanding compilation warnings like this

    WARNING:Xst:1710 - FF/Latch <Mtridata_cts_8_10> (without init value) has a constant value of 1 in block <channel_selector>. This FF/Latch will be trimmed during the optimization process.
    It's a warning about removing signals that have no effect on the design output during optimization. "FF/Latch" refers to any memory element, not specifically latches.

    I didn't check if the design serves a useful purpose, but there are no latches.

    missing if else statement might cause latches
    It does in combinational always block, not in registered code.


    1 members found this post helpful.

    •   Alt5th November 2017, 10:21

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  7. #7
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    Re: Latches create in verilog code

    Yes FVM you are right. I alright solve that problem.



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