csarami
Newbie level 4
Hi,
As a newbie I am trying to test a very simple verilog as follows:
I issue the following command:
However, I get the following error message:
Thank you in advance,
CS
As a newbie I am trying to test a very simple verilog as follows:
Code:
module gates(A,B,C,D,E);
input A,B,C;
output D,E;
assign #5 D = A|| B;
assign #5 E = C || D;
endmodule
I issue the following command:
Code:
add list A B C D E
force A 0
However, I get the following error message:
Code:
ModelSim> force A 0
# ** Error (suppressible): (vish-4008) Object 'A' not found.
#
Thank you in advance,
CS