wtr
Full Member level 5
Hello all,
I want to declare a record constant.
I have a signal within a record that is a an array of bytes.
Error message is
(vcom-1067) Illegal choice (indexed name) in record aggregate. Legal choices are element_simple_name and OTHERS.
You can do this for an entity declaration can you not? You can do a signal assignment such as x <= val(1).ue;
Have I just got my syntax messed up?
- - - Updated - - -
I think I answered my own question.
Nope!! scratch that...this just lead to further errors later on.
I want to declare a record constant.
I have a signal within a record that is a an array of bytes.
Code VHDL - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 type byte_ar_t is array (integer range <>) of byte_t; type x is record sig1 : byte_t; sig2 : byte_ar_t(4 downto 1); sig3 : byte_ar_t(4 downto 1); sig4 : byte_ar_t(4 downto 1); end record; constant x_default : x := ( sig1 => (others => '0'), --fine sig2 => (x"00", x"01, x"03, x"00"), --fine sig3 => (others => (others => '0'), -- fine sig4(4) => (others => '0'), -- error sig4(3) => X"01", -- error sig4(2) => x"00", -- error sig4(1) => x"11" -- error );
Error message is
(vcom-1067) Illegal choice (indexed name) in record aggregate. Legal choices are element_simple_name and OTHERS.
You can do this for an entity declaration can you not? You can do a signal assignment such as x <= val(1).ue;
Have I just got my syntax messed up?
- - - Updated - - -
I think I answered my own question.
Code VHDL - [expand] 1 2 3 4 5 6 sig4 => ( sig4(4) =>(others => '0'), sig4(3) =>x"01", sig4(2) =>x"00", sig4(1) =>x"11", );
Nope!! scratch that...this just lead to further errors later on.