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Verilog code for mod 3 4 bit asynchronous counter

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sugubai

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pls anybody help me to write the VERILOG CODE for mod 3 4 bit asynchronous counter using structural modeling..
 
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Re: Help me to write verilog code

Hi,

as always: show what you have done so far.

With paper and pencil, with pseudo code, what documents/tutorials did you use...

Then show us where exactely you see the problem.

Klaus
 

Re: Help me to write verilog code

IMG_20171025_184036[1].jpg

the mod 3 structure is here..pls help me to write the verilog code
 

Re: Help me to write verilog code

Your first JK has no clock?

Have you tried searching for "verilog JK flip flop" using google?
ans: obviously not
 

Re: Help me to write verilog code

IMG_20171025_204530[1].jpg

IMG_20171025_204530[1].jpg
 

Re: Help me to write verilog code

So you expect someone else to just write the code for you?

Oh, look some people have written code and posted it on the internet...Did you click on the link in my previous post #4, it gives you a lot of google links to pages that have verilog code for a JK flip flop of varying levels of quality. Some of these examples are downright wrong as they misuse blocking statements in a edge sensitive always block.
 

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