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How many cycles does it take to perform this code using the ADSP-2189 processor?

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PozFeedback

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Hi,

The attached image shows the implementation of an FIR filter (taken from "Mixed-Signal and DSP Design Techniques")
The book mentions that this FIR subroutine requires a total of N + 5 cycles for a filter of length N, and uses these numbers to determine how fast the implementation would be in real-time. I'm not sure which of these operations are performed in parallel, I would appreciate if you could clarify this for me.

Thanks in advance.
 

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