Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

ADS optimization and CST discrete ports

Status
Not open for further replies.

2mmm2

Newbie level 4
Joined
Oct 18, 2017
Messages
6
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
60
Hi all,
I am trying to optimize input and output impedance for a balanced diode frequency doubler and I am determining those impedances through a balanced circuit with 3 and 3 diodes in ADS as shown in the picture.
I need to match my 3D structure in CST to present the optimal input (first harmonic) and output (second harmonic) impedance to the diodes, in CST I use a discrete port for each one of the diodes.
When I export the structure in ADS to optimize and check s-parms I get a data component (S-parms) with input and output port (waveguide port in CST) and the 6 discrete ports of the diodes, then should I connect 6 source/output impedances to the diode ports? In other words, how does it translate the circuit schematic with the balun in ADS with a balanced/unbalanced structure in CST in terms of embedding impedances?
 

Attachments

  • IMG_7708.jpg
    IMG_7708.jpg
    527.4 KB · Views: 107

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top