+ Post New Thread
Results 1 to 3 of 3
  1. #1
    Advanced Member level 2
    Points: 3,836, Level: 14

    Join Date
    Apr 2011
    Posts
    530
    Helped
    24 / 24
    Points
    3,836
    Level
    14

    What does it mean to pipeline a multiplexer, how is it done?

    For very large multiplexers in FPGAs, there will be a huge propagation delay that may create a critical path and cause timing violation.

    Therefore, one possibility I assume is to use multicycle path for very large multiplexers in FPGA.
    Another possibility according to https://www.doulos.com/knowhow/fpga/multiplexer/ is to pipeline the multiplexer.

    What does it mean to pipeline the multiplexer since it is just a combinatorial block anyway? Merely registering the input and output will not be enough I assume.

    •   Alt12th October 2017, 13:18

      advertising

        
       

  2. #2
    Advanced Member level 5
    Points: 35,441, Level: 45
    Achievements:
    7 years registered

    Join Date
    Jun 2010
    Posts
    6,486
    Helped
    1891 / 1891
    Points
    35,441
    Level
    45

    Re: What does it mean to pipeline a multiplexer, how is it done?

    you can pipeline pretty much anything - why would a multiplexor be any different?
    Yes, its a combinatorial thing at a basic level, but what about 8 to 1 made out of 7 2-1 muxes with registers at all input/outputs?



    •   Alt12th October 2017, 13:43

      advertising

        
       

  3. #3
    Advanced Member level 4
    Points: 5,373, Level: 17

    Join Date
    Apr 2016
    Posts
    1,129
    Helped
    202 / 202
    Points
    5,373
    Level
    17

    Re: What does it mean to pipeline a multiplexer, how is it done?

    think of it as a tree of smaller muxes. you pipeline halfway through the tree, very simple.
    Really, I am not Sam.



--[[ ]]--