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  1. #1
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    What does it mean to pipeline a multiplexer, how is it done?

    For very large multiplexers in FPGAs, there will be a huge propagation delay that may create a critical path and cause timing violation.

    Therefore, one possibility I assume is to use multicycle path for very large multiplexers in FPGA.
    Another possibility according to https://www.doulos.com/knowhow/fpga/multiplexer/ is to pipeline the multiplexer.

    What does it mean to pipeline the multiplexer since it is just a combinatorial block anyway? Merely registering the input and output will not be enough I assume.

    •   Alt12th October 2017, 13:18

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  2. #2
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    Re: What does it mean to pipeline a multiplexer, how is it done?

    you can pipeline pretty much anything - why would a multiplexor be any different?
    Yes, its a combinatorial thing at a basic level, but what about 8 to 1 made out of 7 2-1 muxes with registers at all input/outputs?



    •   Alt12th October 2017, 13:43

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  3. #3
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    Re: What does it mean to pipeline a multiplexer, how is it done?

    think of it as a tree of smaller muxes. you pipeline halfway through the tree, very simple.
    Really, I am not Sam.



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