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Is it good to copy and paste the Layout in Cadence?

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Hi,

I always use the copy-paste the layout in Cadence. But, recently I came across Baker book ( CMOS: Circuit, Design, Layout and Optimization ) 1998 Edition, where he suggested not to use the copy/paste feature because it would enlarge GDS file. I am sure it has been almost 20years since and the CAD should be optimized to overcome these issues! I post this here to ask you guys, Is that still be a problem in current Candece versions? I am using Cadence 6.1.6, so do I really need to avoid using the copy feature?

I attach the section from Baker book.
 

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Are you going to edit what you copied? If not, just create a cell of what you want to copy and use that instead.
 
rangermad said:
Are you going to edit what you copied? If not, just create a cell of what you want to copy and use that instead.
Click to expand...

for logic gates, I usually do that, the cells. For other part of the circuit, I copy/paste. So hope that's not an issue?
 

Cells are more efficient than bunches of "0X" data. How
much you care about GDS file bloat, depends. But cells
can also be a good way to keep things "stuck together"
while large amounts of "0X" bits and pieces are targets
for "oops...".
 
it would be better if your final gds had hierarchical instances instead of a bunch of leaf nodes that appear multiple times. that is what the author was referring to. it was a problem back then, it still is a problem now. often we are dealing with gds files that have 10s of gigabytes
 
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