Frame buffer controller with dual_clock FIFO

I am trying to build a frame buffer controller to control two video feeds coming from two stereo cameras simultaneously on digilent Atlys board (spartan 6). the buffer is composed of a true dual port memory with two ports A and B to store the two video feeds the data is read from either ports and stored in FIFO for reading, the problem is that the reading is slower that the writing
(Rd_clk = 13.4 ns) and (Wr_clk = 12.5 ns), is it possible to read the video feeds continuously and are there any conditions here ?

So you are using the same block ram to receive both video streams? i.e. A port is camera 1 B port has camera 2?

That isn't going to work, as you would need to read using the address A and address B that are being used for writing. You also have to ensure that the address A and B don't overlap you will have to split the ram into two sections based on say the upper most address bit.

Interleaving the reads and writes will mean the write clock and read clock will be an issue if the write aggregate rate is faster than the 26.8 ns (i.e. 37.3 MHz 1/2 the read rate) unless there is some known dead time in the write data stream that lowers the aggregate rate of input data.

Taki_comp said:

I am trying to build a frame buffer controller to control two video feeds coming from two stereo cameras simultaneously on digilent Atlys board (spartan 6). the buffer is composed of a true dual port memory with two ports A and B to store the two video feeds the data is read from either ports and stored in FIFO for reading, the problem is that the reading is slower that the writing
(Rd_clk = 13.4 ns) and (Wr_clk = 12.5 ns), is it possible to read the video feeds continuously and are there any conditions here ?

Click to expand...

This doesn't really make sense: you're writing two separate streams to a single RAM at the same time that you're trying to read that RAM?
I don't know your system architecture, but wouldn't it make more sense to write the streams to separate RAMs? You can multiplex the output of the RAMs, depending on what you're actually trying to do.
Can you read the video feeds continuously? Of course not. Well, maybe for a while. At some point your memory is going to overflow, unless your video occurs in bursts.
There's not enough information here to answer your questions accurately.

I splitted the memory into two sections so that each of the ports has its unique address space, so there is no overlapping here, I didnt use two separate block of RAMS beacuase I'm trying to save the resources here

Taki_comp said:

I splitted the memory into two sections so that each of the ports has its unique address space, so there is no overlapping here, I didnt use two separate block of RAMS beacuase I'm trying to save the resources here

Click to expand...

You still can't write and read from the same port simultaneously, which is what you're proposing.

The whole point of dual-port RAM is to allow a read/write access to two different ports on the same memory.

Your proposal requires reading/writing access for two sets of ports or in other words 4 simultaneous accesses to the same memory, can't be done.

Better read the Block RAM documentation before proceeding any further.

The clock rates are low. just add an intermediate faster clock and serialize the reads/writes as needed.

in terms of overflow, you would need to read out more bits of data per read, or avoid writing on every cycle. The read bandwidth must be higher than the write bandwidth. If every cycle is valid on each clock than the read data bus will be larger than the write data bus.