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Very confused with timer gate operation

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I am using dspic33 family controller. I need to measure the frequency of external signal. I want to operate in timer gate operation by feeding to timer external clock signal. So as long as the signal is high the timer register will increment and once the signal becomes low i get the interrupt. My two questions are when should i read the timer register values? One should be in interrupt but the other time?
What happens in case overflow happens multiple times within the signal? Please advice.
 

Hi,

when should i read the timer register values?
Click to expand...
Either you start with 0, or save the current counter register value before you enable the gateing.

What happens in case overflow happens multiple times within the signal? Please advice.
Click to expand...
I recommend to specify max_input_frequency = max_counter_value / gate_time.

But for sure you may create an interrupt on overflow and in the ISR increment a variable to see how often an overflow occured.


***
It all depends on your requirements: clock frequency, input_frequency range, gate_time...

Klaus
 

My confusion is because a single timer interrupt is provided for both overflow and external signal getting low. So how to identify if the interrupt is because of overflow or external signal?
 

Hi,

I´m not familiar with dspic33....is this really the case?

But if it really is the same interrupt then you just have to check the flags that tell you the source of the interrupt request.


Klaus
 

I will go through the regiaters once again. Is there any difference between measuring the frequency using input capture and timer gated method? Like one efficient than the other. Any such thing?
 

Hi;

capture method is good for low frequencies where: signal_freq << counter_frequency

Klaus
 

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