Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

why PMOS has the lower Vds than NMOS?

Status
Not open for further replies.

kobeismygod

Junior Member level 1
Joined
Dec 22, 2013
Messages
17
Helped
4
Reputation
8
Reaction score
3
Trophy points
3
Activity points
101
why PMOS has the lower Vds than NMOS?
 

Vds voltage arises from the circuit, it's not an inherent feature of transistor type.
 

The question has no sense..Did you mean Vds(max) ?
 

Not convinced this is true on any basis, let alone there
being a "why".

In my experience across numerous technologies, the P
device for equal reliability and equal L has a higher max
Vds. PMOS leakage "walks out" while NMOS "walks in"
from hot carrier type effects (which are usually the
limiter for Vds rating at short channel).
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top