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  1. #1
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    shift left(or right) with arithmetic operation for data type SIGNED in VHDL

    I have to use shift operation for signed data type. sll and srl are synthesizable, however sla and sra are not. How can I perform them?

    •   Alt12th September 2017, 08:41

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    Re: shift left(or right) with arithmetic operation for data type SIGNED in VHDL

    sla is the same as srl.
    sra exists in the 2008 version of numeric_std (and in the '93 compatability package).

    Otherwise, you can just use the resize function and slice it - or write your own

    Code VHDL - [expand]
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    function "sra" (l : signed; r : natural) return signed is
      alias l_a : signed(l'length-1 downto 0) is l;
    begin
      return resize(l_a, l_a'length + r)(l_a'length+r-1 downto r);
    end function "sra";



    •   Alt12th September 2017, 09:27

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  3. #3
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    Re: shift left(or right) with arithmetic operation for data type SIGNED in VHDL

    I have selected VHDL-200X and the code is as follows:
    Code VHDL - [expand]
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    library IEEE;
    use IEEE.STD_LOGIC_1164.ALL;
    use IEEE.NUMERIC_STD.ALL;
     
    entity shift is
        Port ( din : in  STD_LOGIC_VECTOR(7 downto 0);
               clk : in  STD_LOGIC;
               dout : out  STD_LOGIC_VECTOR(7 downto 0));
    end shift;
     
    architecture Behavioral of shift is
    SIGNAL s1,s2 : SIGNED(7 downto 0);
    begin
        Process(clk)
            VARIABLE v1 : SIGNED(7 downto 0);
        BEGIN
            IF clk'event and clk = '1' then
                s1 <= signed(din);
                s2 <= s1 sla 2;
                dout <= std_logic_vector(s2);
            END IF;
        END PROCESS;
     
     
    end Behavioral;

    It shows the following error
    ERROR:HDLParsers:808 - Line 19. sla can not have such operands in this context.
    Am I making any mistake while using sla or it is still not supported in VHDL-2008?



    •   Alt12th September 2017, 09:38

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  4. #4
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    Re: shift left(or right) with arithmetic operation for data type SIGNED in VHDL

    I assume this is Vivado? it does not support the 2008 versions of the IEEE packages. It only has selective support for some parts of VHDL 2008. Hence why they call it 200X (to cover both 2002/2008).
    Afaik, Intel Quartus Pro 17 and synplify are the only two tools to have proper 2008 support

    - - - Updated - - -

    But like I said, you're using sla - this is identical in functionality to sll for signed. So use SLL instead.



  5. #5
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    Re: shift left(or right) with arithmetic operation for data type SIGNED in VHDL

    I assume this is Vivado?
    I am actually working on Xilinx ISE 14.2.
    you're using sla - this is identical in functionality to sll for signed. So use SLL instead.
    when I try this,
    x = 11001010;
    y = x sll 2;
    y =00101000;
    which is a positive number!!



    •   Alt12th September 2017, 10:07

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  6. #6
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    Re: shift left(or right) with arithmetic operation for data type SIGNED in VHDL

    What do you expect? you're shifting it by 2 (multiplying by 4) and limiting the bit width to 8 bits, and clearly its overflowing. Shifting left always appends 0 to the right (sra and srl both do this). sra appends the sign bit.

    see https://en.wikipedia.org/wiki/Arithmetic_shift



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    Re: shift left(or right) with arithmetic operation for data type SIGNED in VHDL

    I needed to use both sla and sra. Then I can use the function you provided above for sra and sll for sla.



  8. #8
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    Re: shift left(or right) with arithmetic operation for data type SIGNED in VHDL

    Quote Originally Posted by rafimiet View Post
    I needed to use both sla and sra. Then I can use the function you provided above for sra and sll for sla.
    As with most code from the internet - use at your own peril.
    Completely Untested.



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