sitawman
Newbie level 5
Hi!, I did place and route of a design and for the hold-time slack i got 0ns, but it says it met the timing. But when i read the design in primetime, then read sdc and spef, i get a hold-time slack of -0.27ns, is there anyway i can add extra slack during place and route, make it more than 0ns? or even if not during place and route, maybe in synthesis? I use DC and ICC. Thanks!