virat_gupta
Newbie level 1
hello, i have been trying to design radix-4 booth multiplier using 3:2 CSA, here is the code but im getting wrong results.. can anyone help me what's wrong in this code
Code Verilog - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 module booth_algorithm (x, y, p); parameter width=16; parameter N = width/2; input[width-1:0]x, y; output[2*width-1:0]p; reg [2:0] cc[N-1:0]; reg [width:0] pp[N-1:0]; reg [2*width-1:0] spp[N-1:0]; wire [2*width-1:0] sum8,sum10,sum12,sum14,sum16,sum18,sum20; wire [2*width-1:0] sum9,sum11,sum13,sum15,sum17,sum19,sum21; wire [width:0] inv_x; integer kk,ii; assign inv_x = {~x[width-1],~x}+1; always @ (x or y or inv_x) begin cc[0] = {y[1],y[0],1'b0}; for(kk=1;kk<N;kk=kk+1) cc[kk] = {y[2*kk+1],y[2*kk],y[2*kk-1]}; for(kk=0;kk<N;kk=kk+1) begin case(cc[kk]) 3'b001 , 3'b010 : pp[kk] = {x[width-1],x}; 3'b011 : pp[kk] = {x,1'b0}; 3'b100 : pp[kk] = {inv_x[width-1:0],1'b0}; 3'b101 , 3'b110 : pp[kk] = inv_x; default : pp[kk] = 0; endcase spp[kk] = $signed(pp[kk]); end for(kk=1;kk<N;kk=kk+1) spp[kk] = {spp[kk],2'b00}; //multiply by 2 to the power x or shifting operation end //add all partial produces using carry save adders. //first stage of 3:2 CSA csa_32 csa_32_0 ( .s1(sum8), .s2(sum9), .p1(spp[0]), .p2(spp[1]), .p3(spp[2]) ); csa_32 csa_32_1 ( .s1(sum10), .s2(sum11), .p1(spp[3]), .p2(spp[4]), .p3(spp[5]) ); csa_32 csa_32_2 ( .s1(sum12), .s2(sum13), .p1(spp[6]), .p2(spp[7]), .p3(32'b0) ); ////second stage of 3:2 CSA csa_32 csa_32_3 ( .s1(sum14), .s2(sum15), .p1(sum8), .p2(sum9[31:0]), .p3(sum10) ); csa_32 csa_32_4 ( .s1(sum16), .s2(sum17), .p1(sum11[31:0]), .p2(sum12), .p3(sum13[31:0]) ); //third stage of 3:2 CSA csa_32 csa_32_5 ( .s1(sum18), .s2(sum19), .p1(sum14), .p2(sum15[31:0]), .p3(sum16) ); csa_32 csa_32_6 ( .s1(sum20), .s2(sum21), .p1(sum18), .p2(sum19[31:0]), .p3(sum17[31:0]) ); assign p = sum20+sum21; endmodule module csa_32(s1,s2,p1,p2,p3); output [31:0] s1,s2; input [31:0] p1,p2,p3; generate genvar i; for(i=0;i<32;i=i+1) begin assign s1[i]=p1[i]^p2[i]^p3[i]; assign s2[i]=(p1[i]&p2[i]) | (p2[i]&p3[i]) | (p3[i]&p1[i]); end endgenerate endmodule
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