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Hierarchical DRC awareness

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Sanketp20

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Hi

I have placed IP marker in my IP blocks to recognize IP blocks.
There are DRCs which we don't want to flag in those IP blocks. Of course, first approach come to mind is to tell DRCs not to flag under IP marker. But that raises concern if someone places some other devices or routes over those IP blocks at chip top level. For example if some one routes Metal5 over those IP blocks at chip level and those metal5 have spacing violations, those violations will be ignored by DRC because they lie under IP marker. So how can make sure that I flag DRCs outside of IP block ?

Please help.

Thanks
 

First, use "IP" marker sparingly, just enough to cover
the extents of any DRC violation.

In the past when I had control of my own PDKs, I
have gone to the lengths of making a DRC-ignore
logic that was specific to the layers (I only cared
about a couple of fixed cases, not general blocking).
If you had (say) a min-poly DRC, I'd work on maybe
a drcIgnorePoly construct that could place a texted
polygon covering the fault, which -only- affects
poly min rule check (and would have no influence
over the Met5 case you pose).

Of course if you're not allowed, or not up to making
private versions of DRC decks, maybe you just have
to constrain your DRC-blocking area-wise. But layer
comprehension (or even rule specificity) would be a
cleaner way to go.
 

What DRC tool are you using? If Calibre, use their signoff utility to waive all errors in your IP blocks. They will not show up in subsequent runs. Other DRC tools may have similar functionality.
 

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